Skip to content

[MLIR][XeGPU] Add unroll patterns and blocking pass for XeGPU [2/N] #140163

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 43 commits into from
Jun 2, 2025
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
43 commits
Select commit Hold shift + click to select a range
777a403
add utils
chencha3 May 12, 2025
af01c99
add skeleton
chencha3 May 12, 2025
e8b43fb
add filter
chencha3 May 13, 2025
3f73fda
clean up
chencha3 May 13, 2025
ab448a3
add scf type conversion util
chencha3 May 13, 2025
7b5e8f1
partial working
chencha3 May 13, 2025
e2eb9e6
refactor pack and unpack
chencha3 May 15, 2025
6ec3604
cleanup layout attr
chencha3 May 15, 2025
bc69a8d
check in elemwise support
chencha3 May 16, 2025
4fc7540
check in unit test
chencha3 May 16, 2025
132f15e
fix format
chencha3 May 16, 2025
aa4ba9c
roll back pass name
chencha3 May 16, 2025
061b6e0
add 1d and 2d elemwise test
chencha3 May 16, 2025
387ac93
refactor
chencha3 May 16, 2025
ebd78ae
fix naming issue
chencha3 May 16, 2025
bbf4796
fix format
chencha3 May 16, 2025
3807eea
fix overflow
chencha3 May 19, 2025
c6695d9
add comments
chencha3 May 19, 2025
50e33ff
add dbg log
chencha3 May 20, 2025
ae22f27
fix format
chencha3 May 20, 2025
9776850
cleanup
chencha3 May 20, 2025
6cffa44
refactor
chencha3 May 20, 2025
d1584fc
Merge branch 'main' into xegpu_blocking_pass
chencha3 May 21, 2025
e023c1a
add a corner unit test
chencha3 May 22, 2025
ee912c2
Merge branch 'main' into xegpu_blocking_pass
chencha3 May 22, 2025
3967810
fix comments
chencha3 May 23, 2025
aebc327
remove unnecessary reference for lambda
chencha3 May 27, 2025
90e7563
rename
chencha3 May 27, 2025
f5bfc2f
address comments
chencha3 May 27, 2025
598fbce
fix format
chencha3 May 27, 2025
ff11a05
add comments
chencha3 May 27, 2025
9f7f715
add comments
chencha3 May 27, 2025
b164d7b
address comments
chencha3 May 27, 2025
554f4b4
refactor
chencha3 May 27, 2025
d9f2e81
refactor getTileShape with template
chencha3 May 27, 2025
18e49f6
add qualifiers
chencha3 May 27, 2025
1f218f4
add qualifiers
chencha3 May 27, 2025
f869b13
refactor setLayoutAttrs
chencha3 May 27, 2025
de75855
cleanup unnecessary reference symbols
chencha3 May 27, 2025
beacf8a
update naming
chencha3 May 28, 2025
c4c7abd
refactor
chencha3 May 28, 2025
70e84c4
refine comments
chencha3 Jun 2, 2025
7dd05fa
Update mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
chencha3 Jun 2, 2025
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 6 additions & 0 deletions mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
Original file line number Diff line number Diff line change
Expand Up @@ -295,11 +295,17 @@ def XeGPU_LayoutAttr : XeGPUAttr<"Layout", "layout"> {
}

LayoutAttr dropSgLayoutAndData() {
// avoid every field of the attribute is nullptr, which may lead to segment fault
if (!getInstData() && !getLaneLayout())
return nullptr;
return LayoutAttr::get(getContext(), nullptr, nullptr, getInstData(),
getLaneLayout(), getLaneData(), getOrder());
}

LayoutAttr dropInstData() {
// avoid every field of the attribute is nullptr, which may lead to segment fault
if (!getSgLayout() && !getLaneLayout())
return nullptr;
return LayoutAttr::get(getContext(), getSgLayout(), getSgData(), nullptr,
getLaneLayout(), getLaneData(), getOrder());
}
Expand Down
13 changes: 13 additions & 0 deletions mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
Original file line number Diff line number Diff line change
Expand Up @@ -45,4 +45,17 @@ def XeGPUWgToSgDistribute : Pass<"xegpu-wg-to-sg-distribute"> {
"gpu::GPUDialect", "index::IndexDialect"];
}

def XeGPUBlocking: Pass<"xegpu-blocking"> {
let summary = "Block XeGPU ops into smaller size.";
let description = [{
This pass partitions operations that process large shapes into multiple
operations on smaller shapes, as specified by the inst_data in the layout
attribute. This enables each resulting operation to be efficiently mapped
to a hardware instruction.
}];
let dependentDialects = [
"memref::MemRefDialect", "xegpu::XeGPUDialect", "vector::VectorDialect"
];
}

#endif // MLIR_DIALECT_XEGPU_TRANSFORMS_PASSES_TD
59 changes: 59 additions & 0 deletions mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,12 @@
namespace mlir {

class VectorType;
class OpOperand;
class OpResult;
class OpBuilder;
class ValueRange;
class TypeConverter;

namespace xegpu {
class LayoutAttr;
class TensorDescType;
Expand Down Expand Up @@ -50,6 +56,59 @@ FailureOr<VectorType> getDistributedVectorType(xegpu::TensorDescType tdescTy);
FailureOr<VectorType> getDistributedVectorType(VectorType originalType,
LayoutAttr layout);

/// Return the attribute name for the OpOperand to attach LayoutAttr
std::string getLayoutName(const OpOperand &operand);

/// Return the attribute name for the OpResult to attach LayoutAttr
std::string getLayoutName(const OpResult result);

/// Retrieves the LayoutAttr associated with a given Value. For TensorDescType
/// values, the LayoutAttr is extracted from the TensorDescType itself. For
/// other values, it is obtained from the attributes of the defining operation.
/// Returns nullptr if no LayoutAttr is found.
LayoutAttr getLayoutAttr(const Value value);

/// Retrieves the LayoutAttr associated with a given OpOperand. It will
/// first check the operand_layout_{id} of the owner operation. If not found,
/// it will check the operand itself and its defining op.
LayoutAttr getLayoutAttr(const OpOperand &opr);

/// Sets the LayoutAttr for a given OpOperand or OpResult by attaching
/// it to the owner's dictionary attributes
template <typename T,
typename = std::enable_if_t<std::is_same_v<T, OpOperand> ||
std::is_same_v<T, OpResult>>>
void setLayoutAttr(const T &operandOrResult, const LayoutAttr layout);

/// Set the LayoutAttr for each OpOperand and OpResult of the given operation.
/// If the operation contains regions, it is also applied recursively to the
/// contained operations
void setLayoutAttrs(Operation *op,
function_ref<LayoutAttr(Value)> getLayoutImpl);

/// Extract a set of small vectors from a value with a given shape using
/// vector.extract_stride_slice
SmallVector<Value> extractVectorsWithShapeFromValue(OpBuilder &builder,
Location loc, Value value,
ArrayRef<int64_t> shape);

/// Create a vector of shape from a set of values using
/// vector.insert_stride_slice.
Value createVectorWithShapeFromValues(OpBuilder &builder, Location loc,
ValueRange values,
ArrayRef<int64_t> shape);

/// Do type conversion for SCF structural ops, e.g., scf.for using SCF structure
/// type convertion patterns. Since VectorType cannot carry the layout
/// attribute, which is needed to guide the type conversion for XeGPU, they are
/// first converted into RankedTensorType, where the layout attribute can be
/// attached. And then upstream SCF structural type conversion patterns are
/// applied with the provided converter.
/// TODO: This is a temporary solution. We should refactor it when context-aware
/// type conversion is available.
void doSCFStructuralTypeConversionWithTensorType(Operation *op,
TypeConverter converter);

} // namespace xegpu

} // namespace mlir
Expand Down
1 change: 1 addition & 0 deletions mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
add_mlir_dialect_library(MLIRXeGPUTransforms
XeGPUBlocking.cpp
XeGPUFoldAliasOps.cpp
XeGPUSubgroupDistribute.cpp
XeGPUUnroll.cpp
Expand Down
Loading