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[GlobalISel] Add known bits and sign-bits handling for G_SPLAT_VECTOR #140204

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Merged
merged 1 commit into from
May 20, 2025
Merged

[GlobalISel] Add known bits and sign-bits handling for G_SPLAT_VECTOR #140204

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19 changes: 18 additions & 1 deletion llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -223,6 +223,14 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known,
}
break;
}
case TargetOpcode::G_SPLAT_VECTOR: {
computeKnownBitsImpl(MI.getOperand(1).getReg(), Known, APInt(1, 1),
Depth + 1);
// Implicitly truncate the bits to match the official semantics of
// G_SPLAT_VECTOR.
Known = Known.trunc(BitWidth);
break;
}
case TargetOpcode::COPY:
case TargetOpcode::G_PHI:
case TargetOpcode::PHI: {
Expand Down Expand Up @@ -904,6 +912,15 @@ unsigned GISelValueTracking::computeNumSignBits(Register R,
}
break;
}
case TargetOpcode::G_SPLAT_VECTOR: {
// Check if the sign bits of source go down as far as the truncated value.
Register Src = MI.getOperand(1).getReg();
unsigned NumSrcSignBits = computeNumSignBits(Src, APInt(1, 1), Depth + 1);
unsigned NumSrcBits = MRI.getType(Src).getSizeInBits();
if (NumSrcSignBits > (NumSrcBits - TyBits))
return NumSrcSignBits - (NumSrcBits - TyBits);
break;
}
case TargetOpcode::G_INTRINSIC:
case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS:
case TargetOpcode::G_INTRINSIC_CONVERGENT:
Expand Down Expand Up @@ -939,7 +956,7 @@ unsigned GISelValueTracking::computeNumSignBits(Register R,
unsigned GISelValueTracking::computeNumSignBits(Register R, unsigned Depth) {
LLT Ty = MRI.getType(R);
APInt DemandedElts =
Ty.isVector() ? APInt::getAllOnes(Ty.getNumElements()) : APInt(1, 1);
Ty.isFixedVector() ? APInt::getAllOnes(Ty.getNumElements()) : APInt(1, 1);
return computeNumSignBits(R, DemandedElts, Depth);
}

Expand Down
35 changes: 35 additions & 0 deletions llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sve-splat.mir
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@@ -0,0 +1,35 @@
# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple aarch64 -mattr=+sve -passes="print<gisel-value-tracking>" %s -o - 2>&1 | FileCheck %s

---
name: Scalable
body: |
bb.1:
; CHECK-LABEL: name: @Scalable
; CHECK-NEXT: %0:_ KnownBits:0000000000001010 SignBits:12
; CHECK-NEXT: %1:_ KnownBits:0000000000001010 SignBits:12
%0:_(s16) = G_CONSTANT i16 10
%1:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR %0(s16)
...
---
name: Scalable_trunc
body: |
bb.1:
; CHECK-LABEL: name: @Scalable_trunc
; CHECK-NEXT: %0:_ KnownBits:00000000000000000000000000001010 SignBits:28
; CHECK-NEXT: %1:_ KnownBits:0000000000001010 SignBits:12
%0:_(s32) = G_CONSTANT i32 10
%1:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR %0(s32)
...
---
name: Scalable_signbits
body: |
bb.1:
; CHECK-LABEL: name: @Scalable_signbits
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????????????????????????????? SignBits:17
; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:17
%0:_(s16) = COPY $h0
%1:_(s32) = G_SEXT %0(s16)
%2:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR %1(s32)
...
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