Skip to content

[llvm][NFC] Use llvm::sort() #140335

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
May 17, 2025
Merged

Conversation

el-ev
Copy link
Member

@el-ev el-ev commented May 17, 2025

No description provided.

@llvmbot
Copy link
Member

llvmbot commented May 17, 2025

@llvm/pr-subscribers-tablegen
@llvm/pr-subscribers-llvm-transforms
@llvm/pr-subscribers-backend-spir-v
@llvm/pr-subscribers-mlgo

@llvm/pr-subscribers-backend-arm

Author: Iris Shi (el-ev)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/140335.diff

18 Files Affected:

  • (modified) llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h (+2-3)
  • (modified) llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp (+4-5)
  • (modified) llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp (+3-3)
  • (modified) llvm/lib/DWARFLinker/Parallel/ArrayList.h (+1-1)
  • (modified) llvm/lib/ExecutionEngine/Orc/Core.cpp (+3-2)
  • (modified) llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp (+1-1)
  • (modified) llvm/lib/ProfileData/InstrProfReader.cpp (+1-1)
  • (modified) llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp (+1-1)
  • (modified) llvm/lib/Target/AMDGPU/AMDGPUPreloadKernelArguments.cpp (+1-1)
  • (modified) llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp (+2-2)
  • (modified) llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp (+1-1)
  • (modified) llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp (+8-8)
  • (modified) llvm/lib/Target/SPIRV/SPIRVUtils.cpp (+1-1)
  • (modified) llvm/lib/TargetParser/AArch64TargetParser.cpp (+4-4)
  • (modified) llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp (+4-4)
  • (modified) llvm/lib/Transforms/Utils/CodeLayout.cpp (+15-18)
  • (modified) llvm/tools/llvm-jitlink/llvm-jitlink.cpp (+3-4)
  • (modified) llvm/utils/TableGen/ExegesisEmitter.cpp (+1-2)
diff --git a/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h b/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h
index 73b2bdf8f181f..35410e18e8e75 100644
--- a/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h
+++ b/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h
@@ -141,11 +141,10 @@ template <typename LoadOrStoreT> class MemSeedBundle : public SeedBundle {
                   "Expected LoadInst or StoreInst!");
     assert(all_of(Seeds, [](auto *S) { return isa<LoadOrStoreT>(S); }) &&
            "Expected Load or Store instructions!");
-    auto Cmp = [&SE](Instruction *I0, Instruction *I1) {
+    llvm::sort(Seeds, [&SE](Instruction *I0, Instruction *I1) {
       return Utils::atLowerAddress(cast<LoadOrStoreT>(I0),
                                    cast<LoadOrStoreT>(I1), SE);
-    };
-    std::sort(Seeds.begin(), Seeds.end(), Cmp);
+    });
   }
   explicit MemSeedBundle(LoadOrStoreT *MemI) : SeedBundle(MemI) {
     static_assert(std::is_same<LoadOrStoreT, LoadInst>::value ||
diff --git a/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp b/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
index ffdf08eec9963..8029fbcf66d39 100644
--- a/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
+++ b/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
@@ -2333,11 +2333,10 @@ static AssignmentTrackingLowering::OverlapMap buildOverlapMapAndRecordDeclares(
   // order of fragment size - there should be no duplicates.
   for (auto &Pair : FragmentMap) {
     SmallVector<DebugVariable, 8> &Frags = Pair.second;
-    std::sort(Frags.begin(), Frags.end(),
-              [](const DebugVariable &Next, const DebugVariable &Elmt) {
-                return Elmt.getFragmentOrDefault().SizeInBits >
-                       Next.getFragmentOrDefault().SizeInBits;
-              });
+    llvm::sort(Frags, [](const DebugVariable &Next, const DebugVariable &Elmt) {
+      return Elmt.getFragmentOrDefault().SizeInBits >
+             Next.getFragmentOrDefault().SizeInBits;
+    });
     // Check for duplicates.
     assert(std::adjacent_find(Frags.begin(), Frags.end()) == Frags.end());
   }
diff --git a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
index 1cde094d78e23..386daa5b9042a 100644
--- a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
+++ b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
@@ -1056,9 +1056,9 @@ void llvm::extractInstructionFeatures(
   // frequency vector, mapping each instruction to its associated MBB.
 
   // Start off by sorting the segments based on the beginning slot index.
-  std::sort(
-      LRPosInfo.begin(), LRPosInfo.end(),
-      [](LRStartEndInfo A, LRStartEndInfo B) { return A.Begin < B.Begin; });
+  llvm::sort(LRPosInfo, [](LRStartEndInfo A, LRStartEndInfo B) {
+    return A.Begin < B.Begin;
+  });
   size_t InstructionIndex = 0;
   size_t CurrentSegmentIndex = 0;
   SlotIndex CurrentIndex = LRPosInfo[0].Begin;
diff --git a/llvm/lib/DWARFLinker/Parallel/ArrayList.h b/llvm/lib/DWARFLinker/Parallel/ArrayList.h
index d99fdcc8c60c0..98d1fe0eb1b28 100644
--- a/llvm/lib/DWARFLinker/Parallel/ArrayList.h
+++ b/llvm/lib/DWARFLinker/Parallel/ArrayList.h
@@ -82,7 +82,7 @@ template <typename T, size_t ItemsGroupSize = 512> class ArrayList {
     forEach([&](T &Item) { SortedItems.push_back(Item); });
 
     if (SortedItems.size()) {
-      std::sort(SortedItems.begin(), SortedItems.end(), Comparator);
+      llvm::sort(SortedItems, Comparator);
 
       size_t SortedItemIdx = 0;
       forEach([&](T &Item) { Item = SortedItems[SortedItemIdx++]; });
diff --git a/llvm/lib/ExecutionEngine/Orc/Core.cpp b/llvm/lib/ExecutionEngine/Orc/Core.cpp
index cbed057950aea..66fca7cf74bdd 100644
--- a/llvm/lib/ExecutionEngine/Orc/Core.cpp
+++ b/llvm/lib/ExecutionEngine/Orc/Core.cpp
@@ -1142,8 +1142,9 @@ void JITDylib::dump(raw_ostream &OS) {
     std::vector<std::pair<SymbolStringPtr, SymbolTableEntry *>> SymbolsSorted;
     for (auto &KV : Symbols)
       SymbolsSorted.emplace_back(KV.first, &KV.second);
-    std::sort(SymbolsSorted.begin(), SymbolsSorted.end(),
-              [](const auto &L, const auto &R) { return *L.first < *R.first; });
+    llvm::sort(SymbolsSorted, [](const auto &L, const auto &R) {
+      return *L.first < *R.first;
+    });
 
     for (auto &KV : SymbolsSorted) {
       OS << "    \"" << *KV.first << "\": ";
diff --git a/llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp b/llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp
index 9b842180fa7a7..3b68d55b089a6 100644
--- a/llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp
+++ b/llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp
@@ -49,7 +49,7 @@ static void preserveDWARFSection(LinkGraph &G, Section &Sec) {
 static SmallVector<char, 0> getSectionData(Section &Sec) {
   SmallVector<char, 0> SecData;
   SmallVector<Block *, 8> SecBlocks(Sec.blocks().begin(), Sec.blocks().end());
-  std::sort(SecBlocks.begin(), SecBlocks.end(), [](Block *LHS, Block *RHS) {
+  llvm::sort(SecBlocks, [](Block *LHS, Block *RHS) {
     return LHS->getAddress() < RHS->getAddress();
   });
   // Convert back to what object file would have, one blob of section content
diff --git a/llvm/lib/ProfileData/InstrProfReader.cpp b/llvm/lib/ProfileData/InstrProfReader.cpp
index e6c83430cd8e9..e5ec016c91bb0 100644
--- a/llvm/lib/ProfileData/InstrProfReader.cpp
+++ b/llvm/lib/ProfileData/InstrProfReader.cpp
@@ -487,7 +487,7 @@ RawInstrProfReader<IntPtrT>::getTemporalProfTraces(
     return TemporalProfTraces;
   }
   // Sort functions by their timestamps to build the trace.
-  std::sort(TemporalProfTimestamps.begin(), TemporalProfTimestamps.end());
+  llvm::sort(TemporalProfTimestamps);
   TemporalProfTraceTy Trace;
   if (Weight)
     Trace.Weight = *Weight;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
index dbe74b1b08f8c..0b5868fc4873f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
@@ -589,7 +589,7 @@ void PipelineSolver::populateReadyList(
   }
 
   if (UseCostHeur)
-    std::sort(ReadyList.begin(), ReadyList.end(), llvm::less_second());
+    llvm::sort(ReadyList, llvm::less_second());
 
   assert(ReadyList.size() == CurrSU.second.size());
 }
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPreloadKernelArguments.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPreloadKernelArguments.cpp
index 5027705ef61de..d0bea0585c241 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPreloadKernelArguments.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPreloadKernelArguments.cpp
@@ -224,7 +224,7 @@ class PreloadKernelArgInfo {
 
     // Allocate loads in order of offset. We need to be sure that the implicit
     // argument can actually be preloaded.
-    std::sort(ImplicitArgLoads.begin(), ImplicitArgLoads.end(), less_second());
+    llvm::sort(ImplicitArgLoads, less_second());
 
     // If we fail to preload any implicit argument we know we don't have SGPRs
     // to preload any subsequent ones with larger offsets. Find the first
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 69bc84a6733c0..e83ae43a325e5 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -6844,8 +6844,8 @@ bool ARMPipelinerLoopInfo::tooMuchRegisterPressure(SwingSchedulerDAG &SSD,
          ++Stage) {
       std::deque<SUnit *> Instrs =
           SMS.getInstructions(Cycle + Stage * SMS.getInitiationInterval());
-      std::sort(Instrs.begin(), Instrs.end(),
-                [](SUnit *A, SUnit *B) { return A->NodeNum > B->NodeNum; });
+      llvm::sort(Instrs,
+                 [](SUnit *A, SUnit *B) { return A->NodeNum > B->NodeNum; });
       llvm::append_range(ProposedSchedule, Instrs);
     }
 
diff --git a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
index 56cbd9414c9ee..55a468f215c46 100644
--- a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
@@ -104,7 +104,7 @@ bool SPIRVExtensionsParser::parse(cl::Option &O, StringRef ArgName,
                                   std::set<SPIRV::Extension::Extension> &Vals) {
   SmallVector<StringRef, 10> Tokens;
   ArgValue.split(Tokens, ",", -1, false);
-  std::sort(Tokens.begin(), Tokens.end());
+  llvm::sort(Tokens);
 
   std::set<SPIRV::Extension::Extension> EnabledExtensions;
 
diff --git a/llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp b/llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
index 68448acf45c3c..5d18729363ec2 100644
--- a/llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
@@ -660,14 +660,14 @@ class SPIRVStructurizer : public FunctionPass {
     Instruction *InsertionPoint = *MergeInstructions.begin();
 
     PartialOrderingVisitor Visitor(F);
-    std::sort(MergeInstructions.begin(), MergeInstructions.end(),
-              [&Visitor](Instruction *Left, Instruction *Right) {
-                if (Left == Right)
-                  return false;
-                BasicBlock *RightMerge = getDesignatedMergeBlock(Right);
-                BasicBlock *LeftMerge = getDesignatedMergeBlock(Left);
-                return !Visitor.compare(RightMerge, LeftMerge);
-              });
+    llvm::sort(MergeInstructions,
+               [&Visitor](Instruction *Left, Instruction *Right) {
+                 if (Left == Right)
+                   return false;
+                 BasicBlock *RightMerge = getDesignatedMergeBlock(Right);
+                 BasicBlock *LeftMerge = getDesignatedMergeBlock(Left);
+                 return !Visitor.compare(RightMerge, LeftMerge);
+               });
 
     for (Instruction *I : MergeInstructions) {
       I->moveBefore(InsertionPoint->getIterator());
diff --git a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
index f38794afab436..48bacaa2d5c47 100644
--- a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
@@ -662,7 +662,7 @@ PartialOrderingVisitor::PartialOrderingVisitor(Function &F) {
   for (auto &[BB, Info] : BlockToOrder)
     Order.emplace_back(BB);
 
-  std::sort(Order.begin(), Order.end(), [&](const auto &LHS, const auto &RHS) {
+  llvm::sort(Order, [&](const auto &LHS, const auto &RHS) {
     return compare(LHS, RHS);
   });
 }
diff --git a/llvm/lib/TargetParser/AArch64TargetParser.cpp b/llvm/lib/TargetParser/AArch64TargetParser.cpp
index e13c6e6d28c2b..04da2f3e9acbb 100644
--- a/llvm/lib/TargetParser/AArch64TargetParser.cpp
+++ b/llvm/lib/TargetParser/AArch64TargetParser.cpp
@@ -227,10 +227,10 @@ AArch64::printEnabledExtensions(const std::set<StringRef> &EnabledFeatureNames)
       EnabledExtensionsInfo.push_back(*ExtInfo);
   }
 
-  std::sort(EnabledExtensionsInfo.begin(), EnabledExtensionsInfo.end(),
-            [](const ExtensionInfo &Lhs, const ExtensionInfo &Rhs) {
-              return Lhs.ArchFeatureName < Rhs.ArchFeatureName;
-            });
+  llvm::sort(EnabledExtensionsInfo,
+             [](const ExtensionInfo &Lhs, const ExtensionInfo &Rhs) {
+               return Lhs.ArchFeatureName < Rhs.ArchFeatureName;
+             });
 
   for (const auto &Ext : EnabledExtensionsInfo) {
     outs() << "    "
diff --git a/llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp b/llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
index 5b4350845b726..37121faecc779 100644
--- a/llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
+++ b/llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
@@ -2945,7 +2945,7 @@ void CallsiteContextGraph<DerivedCCG, FuncTy, CallTy>::ContextNode::print(
   // Make a copy of the computed context ids that we can sort for stability.
   auto ContextIds = getContextIds();
   std::vector<uint32_t> SortedIds(ContextIds.begin(), ContextIds.end());
-  std::sort(SortedIds.begin(), SortedIds.end());
+  llvm::sort(SortedIds);
   for (auto Id : SortedIds)
     OS << " " << Id;
   OS << "\n";
@@ -2977,7 +2977,7 @@ void CallsiteContextGraph<DerivedCCG, FuncTy, CallTy>::ContextEdge::print(
      << " AllocTypes: " << getAllocTypeString(AllocTypes);
   OS << " ContextIds:";
   std::vector<uint32_t> SortedIds(ContextIds.begin(), ContextIds.end());
-  std::sort(SortedIds.begin(), SortedIds.end());
+  llvm::sort(SortedIds);
   for (auto Id : SortedIds)
     OS << " " << Id;
 }
@@ -3012,7 +3012,7 @@ void CallsiteContextGraph<DerivedCCG, FuncTy, CallTy>::printTotalSizes(
     DenseSet<uint32_t> ContextIds = Node->getContextIds();
     auto AllocTypeFromCall = getAllocationCallType(Node->Call);
     std::vector<uint32_t> SortedIds(ContextIds.begin(), ContextIds.end());
-    std::sort(SortedIds.begin(), SortedIds.end());
+    llvm::sort(SortedIds);
     for (auto Id : SortedIds) {
       auto TypeI = ContextIdToAllocationType.find(Id);
       assert(TypeI != ContextIdToAllocationType.end());
@@ -3211,7 +3211,7 @@ struct DOTGraphTraits<const CallsiteContextGraph<DerivedCCG, FuncTy, CallTy> *>
     std::string IdString = "ContextIds:";
     if (ContextIds.size() < 100) {
       std::vector<uint32_t> SortedIds(ContextIds.begin(), ContextIds.end());
-      std::sort(SortedIds.begin(), SortedIds.end());
+      llvm::sort(SortedIds);
       for (auto Id : SortedIds)
         IdString += (" " + Twine(Id)).str();
     } else {
diff --git a/llvm/lib/Transforms/Utils/CodeLayout.cpp b/llvm/lib/Transforms/Utils/CodeLayout.cpp
index c76b3afef50c2..d5ddd20ee45a1 100644
--- a/llvm/lib/Transforms/Utils/CodeLayout.cpp
+++ b/llvm/lib/Transforms/Utils/CodeLayout.cpp
@@ -986,16 +986,15 @@ class ExtTSPImpl {
     }
 
     // Sorting chains by density in the decreasing order.
-    std::sort(SortedChains.begin(), SortedChains.end(),
-              [&](const ChainT *L, const ChainT *R) {
-                // Place the entry point at the beginning of the order.
-                if (L->isEntry() != R->isEntry())
-                  return L->isEntry();
-
-                // Compare by density and break ties by chain identifiers.
-                return std::make_tuple(-L->density(), L->Id) <
-                       std::make_tuple(-R->density(), R->Id);
-              });
+    llvm::sort(SortedChains, [&](const ChainT *L, const ChainT *R) {
+      // Place the entry point at the beginning of the order.
+      if (L->isEntry() != R->isEntry())
+        return L->isEntry();
+
+      // Compare by density and break ties by chain identifiers.
+      return std::make_tuple(-L->density(), L->Id) <
+             std::make_tuple(-R->density(), R->Id);
+    });
 
     // Collect the nodes in the order specified by their chains.
     std::vector<uint64_t> Order;
@@ -1355,14 +1354,12 @@ class CDSortImpl {
     }
 
     // Sort chains by density in the decreasing order.
-    std::sort(SortedChains.begin(), SortedChains.end(),
-              [&](const ChainT *L, const ChainT *R) {
-                const double DL = ChainDensity[L];
-                const double DR = ChainDensity[R];
-                // Compare by density and break ties by chain identifiers.
-                return std::make_tuple(-DL, L->Id) <
-                       std::make_tuple(-DR, R->Id);
-              });
+    llvm::sort(SortedChains, [&](const ChainT *L, const ChainT *R) {
+      const double DL = ChainDensity[L];
+      const double DR = ChainDensity[R];
+      // Compare by density and break ties by chain identifiers.
+      return std::make_tuple(-DL, L->Id) < std::make_tuple(-DR, R->Id);
+    });
 
     // Collect the nodes in the order specified by their chains.
     std::vector<uint64_t> Order;
diff --git a/llvm/tools/llvm-jitlink/llvm-jitlink.cpp b/llvm/tools/llvm-jitlink/llvm-jitlink.cpp
index ab2f685b4fc1d..2e98f44f51592 100644
--- a/llvm/tools/llvm-jitlink/llvm-jitlink.cpp
+++ b/llvm/tools/llvm-jitlink/llvm-jitlink.cpp
@@ -1459,10 +1459,9 @@ Error Session::FileInfo::registerMultiStubEntry(
                      Sym.getTargetFlags());
 
   // Let's keep stubs ordered by ascending address.
-  std::sort(Entry.begin(), Entry.end(),
-            [](const MemoryRegionInfo &L, const MemoryRegionInfo &R) {
-              return L.getTargetAddress() < R.getTargetAddress();
-            });
+  llvm::sort(Entry, [](const MemoryRegionInfo &L, const MemoryRegionInfo &R) {
+    return L.getTargetAddress() < R.getTargetAddress();
+  });
 
   return Error::success();
 }
diff --git a/llvm/utils/TableGen/ExegesisEmitter.cpp b/llvm/utils/TableGen/ExegesisEmitter.cpp
index 1b4b0729a5fcc..30cac66786e4f 100644
--- a/llvm/utils/TableGen/ExegesisEmitter.cpp
+++ b/llvm/utils/TableGen/ExegesisEmitter.cpp
@@ -141,8 +141,7 @@ void ExegesisEmitter::emitPfmCountersInfo(const Record &Def,
            ValidationCounter->getValueAsDef("EventType")->getName(),
            getPfmCounterId(ValidationCounter->getValueAsString("Counter"))});
     }
-    std::sort(ValidationCounters.begin(), ValidationCounters.end(),
-              EventNumberLess);
+    llvm::sort(ValidationCounters, EventNumberLess);
     OS << "\nstatic const std::pair<ValidationEvent, const char*> " << Target
        << Def.getName() << "ValidationCounters[] = {\n";
     for (const ValidationCounterInfo &VCI : ValidationCounters) {

@el-ev el-ev merged commit 061a769 into main May 17, 2025
12 checks passed
@el-ev el-ev deleted the users/el-ev/05-17-_llvm_nfc_use_llvm_sort_ branch May 17, 2025 06:49
@llvm-ci
Copy link
Collaborator

llvm-ci commented May 17, 2025

LLVM Buildbot has detected a new failure on builder llvm-clang-x86_64-expensive-checks-debian running on gribozavr4 while building llvm at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/16/builds/19159

Here is the relevant piece of the build log for the reference
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc -mtriple=amdgcn -mcpu=gfx908 -misched-cluster=false -run-pass=machine-scheduler -verify-misched -o - /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir | /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/FileCheck /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir # RUN: at line 2
+ /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc -mtriple=amdgcn -mcpu=gfx908 -misched-cluster=false -run-pass=machine-scheduler -verify-misched -o - /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir
+ /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/FileCheck /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir
/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc -mtriple=amdgcn -mcpu=gfx908 -misched-cluster=false -run-pass=machine-scheduler -amdgpu-igrouplp-exact-solver -verify-misched -o - /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir | /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/FileCheck -check-prefix=EXACT /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir # RUN: at line 3
+ /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/FileCheck -check-prefix=EXACT /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir
+ /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc -mtriple=amdgcn -mcpu=gfx908 -misched-cluster=false -run-pass=machine-scheduler -amdgpu-igrouplp-exact-solver -verify-misched -o - /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir
/b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir:295:16: error: EXACT-NEXT: is not on the line after the previous match
 ; EXACT-NEXT: [[V_MUL_LO_U32_e64_2:%[0-9]+]]:vgpr_32 = nsw V_MUL_LO_U32_e64 [[GLOBAL_LOAD_DWORD_SADDR]], [[DEF1]], implicit $exec
               ^
<stdin>:529:2: note: 'next' match was here
 %5:vgpr_32 = nsw V_MUL_LO_U32_e64 %3, %1, implicit $exec
 ^
<stdin>:525:91: note: previous match ended here
 %9:areg_128 = V_MFMA_F32_4X4X1F32_e64 %1, %3, %8, 0, 0, 0, implicit $mode, implicit $exec
                                                                                          ^
<stdin>:526:1: note: non-matching line after previous match is here
 S_NOP 0
^

Input file: <stdin>
Check file: /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir

-dump-input=help explains the following input dump.

Input was:
<<<<<<
          .
          .
          .
        524:  %6:vgpr_32 = nsw V_MUL_LO_U32_e64 %3, %1, implicit $exec 
        525:  %9:areg_128 = V_MFMA_F32_4X4X1F32_e64 %1, %3, %8, 0, 0, 0, implicit $mode, implicit $exec 
        526:  S_NOP 0 
        527:  %12:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR %0, %1, 512, 0, implicit $exec :: (load (s32) from %ir.in, !alias.scope !0, addrspace 1) 
        528:  %10:areg_128 = V_MFMA_F32_4X4X1F32_e64 %1, %3, %9, 0, 0, 0, implicit $mode, implicit $exec 
        529:  %5:vgpr_32 = nsw V_MUL_LO_U32_e64 %3, %1, implicit $exec 
next:295      !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
        530:  %11:areg_128 = V_MFMA_F32_4X4X1F32_e64 %1, %3, %10, 0, 0, 0, implicit $mode, implicit $exec 
        531:  %13:vgpr_32 = nsw V_MUL_LO_U32_e64 %12, %12, implicit $exec 
        532:  GLOBAL_STORE_DWORD_SADDR %1, %13, %0, 512, 0, implicit $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1) 
        533:  SCHED_GROUP_BARRIER 16, 2, 0 
        534:  SCHED_GROUP_BARRIER 8, 1, 0 
          .
          .
          .
>>>>>>
...

@vvereschaka
Copy link
Contributor

@el-ev ,

these changes also break the following tests on the ubuntu expensive checks builder here - https://lab.llvm.org/buildbot/#/builders/187/builds/5986

  • LLVM::sched-group-barrier-pre-RA.mir
  • LLVM::sched-group-barrier-pipeline-solver.mir

would you take care of it?

el-ev added a commit that referenced this pull request May 20, 2025
@el-ev
Copy link
Member Author

el-ev commented May 20, 2025

@vvereschaka Reverted. I couldn't reproduce the failures locally.

ajaden-codes pushed a commit to Jaddyen/llvm-project that referenced this pull request Jun 6, 2025
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
Development

Successfully merging this pull request may close these issues.

5 participants