[llvm] Use llvm::find_if (NFC) #140412
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[llvm] Use llvm::find_if (NFC) #140412
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llvmbot
added
backend:AArch64
backend:AMDGPU
backend:Hexagon
xray
debuginfo
flang:openmp
clang:openmp
|
@llvm/pr-subscribers-xray @llvm/pr-subscribers-backend-aarch64 Author: Kazu Hirata (kazutakahirata) ChangesFull diff: https://github.com/llvm/llvm-project/pull/140412.diff 6 Files Affected:
diff --git a/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h b/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
index 20fb581ee631a..f702b8dba5a79 100644
--- a/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
+++ b/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
@@ -56,7 +56,7 @@ namespace detail {
template <typename Container, typename Predicate>
typename std::remove_reference_t<Container>::iterator
find_unique(Container &&container, Predicate &&pred) {
- auto first = std::find_if(container.begin(), container.end(), pred);
+ auto first = llvm::find_if(container, pred);
if (first == container.end())
return first;
auto second = std::find_if(std::next(first), container.end(), pred);
diff --git a/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp b/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
index ad14baa0c9269..cad53b8079e70 100644
--- a/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
+++ b/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
@@ -801,9 +801,8 @@ void LVBinaryReader::processLines(LVLines *DebugLines,
// Find the indexes for the lines whose address is zero.
std::vector<size_t> AddressZero;
- LVLines::iterator It =
- std::find_if(std::begin(*DebugLines), std::end(*DebugLines),
- [](LVLine *Line) { return !Line->getAddress(); });
+ LVLines::iterator It = llvm::find_if(
+ *DebugLines, [](LVLine *Line) { return !Line->getAddress(); });
while (It != std::end(*DebugLines)) {
AddressZero.emplace_back(std::distance(std::begin(*DebugLines), It));
It = std::find_if(std::next(It), std::end(*DebugLines),
@@ -930,8 +929,8 @@ void LVBinaryReader::includeInlineeLines(LVSectionIndex SectionIndex,
if (InlineeLines->size()) {
// First address of inlinee code.
uint64_t InlineeStart = (InlineeLines->front())->getAddress();
- LVLines::iterator Iter = std::find_if(
- CULines.begin(), CULines.end(), [&](LVLine *Item) -> bool {
+ LVLines::iterator Iter =
+ llvm::find_if(CULines, [&](LVLine *Item) -> bool {
return Item->getAddress() == InlineeStart;
});
if (Iter != CULines.end()) {
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index bcff151fe62e7..0f33e77d4eecc 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -3389,11 +3389,11 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
// For performance reasons restore SVE register in increasing order
auto IsPPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::PPR; };
- auto PPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsPPR);
+ auto PPRBegin = llvm::find_if(RegPairs, IsPPR);
auto PPREnd = std::find_if_not(PPRBegin, RegPairs.end(), IsPPR);
std::reverse(PPRBegin, PPREnd);
auto IsZPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::ZPR; };
- auto ZPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsZPR);
+ auto ZPRBegin = llvm::find_if(RegPairs, IsZPR);
auto ZPREnd = std::find_if_not(ZPRBegin, RegPairs.end(), IsZPR);
std::reverse(ZPRBegin, ZPREnd);
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 70f9485c3e5b4..9eac2116890a6 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -3720,9 +3720,10 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
// followed by the flags and any other arguments with special meanings.
// Pop them out of CLI.Outs and CLI.OutVals before we do any processing so
// we don't treat them like the "real" arguments.
- auto RequestedExecIt = std::find_if(
- CLI.Outs.begin(), CLI.Outs.end(),
- [](const ISD::OutputArg &Arg) { return Arg.OrigArgIndex == 2; });
+ auto RequestedExecIt =
+ llvm::find_if(CLI.Outs, [](const ISD::OutputArg &Arg) {
+ return Arg.OrigArgIndex == 2;
+ });
assert(RequestedExecIt != CLI.Outs.end() && "No node for EXEC");
size_t SpecialArgsBeginIdx = RequestedExecIt - CLI.Outs.begin();
diff --git a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
index 41cd68c0c0e72..b87cfa07b4d2c 100644
--- a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
@@ -484,10 +484,9 @@ bool HexagonOptAddrMode::findFirstReachedInst(
for (auto &InstIter : *CurrentMBB) {
// If the instruction is an Addi and is in the AddiList
if (InstIter.getOpcode() == Hexagon::A2_addi) {
- auto Iter = std::find_if(
- AddiList.begin(), AddiList.end(), [&InstIter](const auto &SUPair) {
- return SUPair.first.Addr->getCode() == &InstIter;
- });
+ auto Iter = llvm::find_if(AddiList, [&InstIter](const auto &SUPair) {
+ return SUPair.first.Addr->getCode() == &InstIter;
+ });
if (Iter != AddiList.end()) {
UseSN = Iter->first;
return true;
diff --git a/llvm/unittests/XRay/GraphTest.cpp b/llvm/unittests/XRay/GraphTest.cpp
index 9a9e0e424fce4..faf10ea96ce2e 100644
--- a/llvm/unittests/XRay/GraphTest.cpp
+++ b/llvm/unittests/XRay/GraphTest.cpp
@@ -73,8 +73,8 @@ template <typename T> void graphVertexTester(T &G) {
EXPECT_EQ(1u, G.count(u));
EXPECT_EQ(VA[u], EVV->VA);
EXPECT_NE(G.vertices().end(),
- std::find_if(G.vertices().begin(), G.vertices().end(),
- [&](const VVT &VV) { return VV.first == u; }));
+ llvm::find_if(G.vertices(),
+ [&](const VVT &VV) { return VV.first == u; }));
consumeError(EVV.takeError());
}
@@ -98,8 +98,7 @@ template <typename T> void graphEdgeTester(T &G) {
EXPECT_EQ(VA[u.first] * VA[u.second] * ((u.first > u.second) ? 2 : 1),
EEV->EA);
auto Pred = [&](const EVT &EV) { return EV.first == u; };
- EXPECT_NE(G.edges().end(),
- std::find_if(G.edges().begin(), G.edges().end(), Pred));
+ EXPECT_NE(G.edges().end(), llvm::find_if(G.edges(), Pred));
consumeError(EEV.takeError());
}
|
|
@llvm/pr-subscribers-backend-amdgpu Author: Kazu Hirata (kazutakahirata) ChangesFull diff: https://github.com/llvm/llvm-project/pull/140412.diff 6 Files Affected:
diff --git a/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h b/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
index 20fb581ee631a..f702b8dba5a79 100644
--- a/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
+++ b/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
@@ -56,7 +56,7 @@ namespace detail {
template <typename Container, typename Predicate>
typename std::remove_reference_t<Container>::iterator
find_unique(Container &&container, Predicate &&pred) {
- auto first = std::find_if(container.begin(), container.end(), pred);
+ auto first = llvm::find_if(container, pred);
if (first == container.end())
return first;
auto second = std::find_if(std::next(first), container.end(), pred);
diff --git a/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp b/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
index ad14baa0c9269..cad53b8079e70 100644
--- a/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
+++ b/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
@@ -801,9 +801,8 @@ void LVBinaryReader::processLines(LVLines *DebugLines,
// Find the indexes for the lines whose address is zero.
std::vector<size_t> AddressZero;
- LVLines::iterator It =
- std::find_if(std::begin(*DebugLines), std::end(*DebugLines),
- [](LVLine *Line) { return !Line->getAddress(); });
+ LVLines::iterator It = llvm::find_if(
+ *DebugLines, [](LVLine *Line) { return !Line->getAddress(); });
while (It != std::end(*DebugLines)) {
AddressZero.emplace_back(std::distance(std::begin(*DebugLines), It));
It = std::find_if(std::next(It), std::end(*DebugLines),
@@ -930,8 +929,8 @@ void LVBinaryReader::includeInlineeLines(LVSectionIndex SectionIndex,
if (InlineeLines->size()) {
// First address of inlinee code.
uint64_t InlineeStart = (InlineeLines->front())->getAddress();
- LVLines::iterator Iter = std::find_if(
- CULines.begin(), CULines.end(), [&](LVLine *Item) -> bool {
+ LVLines::iterator Iter =
+ llvm::find_if(CULines, [&](LVLine *Item) -> bool {
return Item->getAddress() == InlineeStart;
});
if (Iter != CULines.end()) {
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index bcff151fe62e7..0f33e77d4eecc 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -3389,11 +3389,11 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
// For performance reasons restore SVE register in increasing order
auto IsPPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::PPR; };
- auto PPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsPPR);
+ auto PPRBegin = llvm::find_if(RegPairs, IsPPR);
auto PPREnd = std::find_if_not(PPRBegin, RegPairs.end(), IsPPR);
std::reverse(PPRBegin, PPREnd);
auto IsZPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::ZPR; };
- auto ZPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsZPR);
+ auto ZPRBegin = llvm::find_if(RegPairs, IsZPR);
auto ZPREnd = std::find_if_not(ZPRBegin, RegPairs.end(), IsZPR);
std::reverse(ZPRBegin, ZPREnd);
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 70f9485c3e5b4..9eac2116890a6 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -3720,9 +3720,10 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
// followed by the flags and any other arguments with special meanings.
// Pop them out of CLI.Outs and CLI.OutVals before we do any processing so
// we don't treat them like the "real" arguments.
- auto RequestedExecIt = std::find_if(
- CLI.Outs.begin(), CLI.Outs.end(),
- [](const ISD::OutputArg &Arg) { return Arg.OrigArgIndex == 2; });
+ auto RequestedExecIt =
+ llvm::find_if(CLI.Outs, [](const ISD::OutputArg &Arg) {
+ return Arg.OrigArgIndex == 2;
+ });
assert(RequestedExecIt != CLI.Outs.end() && "No node for EXEC");
size_t SpecialArgsBeginIdx = RequestedExecIt - CLI.Outs.begin();
diff --git a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
index 41cd68c0c0e72..b87cfa07b4d2c 100644
--- a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
@@ -484,10 +484,9 @@ bool HexagonOptAddrMode::findFirstReachedInst(
for (auto &InstIter : *CurrentMBB) {
// If the instruction is an Addi and is in the AddiList
if (InstIter.getOpcode() == Hexagon::A2_addi) {
- auto Iter = std::find_if(
- AddiList.begin(), AddiList.end(), [&InstIter](const auto &SUPair) {
- return SUPair.first.Addr->getCode() == &InstIter;
- });
+ auto Iter = llvm::find_if(AddiList, [&InstIter](const auto &SUPair) {
+ return SUPair.first.Addr->getCode() == &InstIter;
+ });
if (Iter != AddiList.end()) {
UseSN = Iter->first;
return true;
diff --git a/llvm/unittests/XRay/GraphTest.cpp b/llvm/unittests/XRay/GraphTest.cpp
index 9a9e0e424fce4..faf10ea96ce2e 100644
--- a/llvm/unittests/XRay/GraphTest.cpp
+++ b/llvm/unittests/XRay/GraphTest.cpp
@@ -73,8 +73,8 @@ template <typename T> void graphVertexTester(T &G) {
EXPECT_EQ(1u, G.count(u));
EXPECT_EQ(VA[u], EVV->VA);
EXPECT_NE(G.vertices().end(),
- std::find_if(G.vertices().begin(), G.vertices().end(),
- [&](const VVT &VV) { return VV.first == u; }));
+ llvm::find_if(G.vertices(),
+ [&](const VVT &VV) { return VV.first == u; }));
consumeError(EVV.takeError());
}
@@ -98,8 +98,7 @@ template <typename T> void graphEdgeTester(T &G) {
EXPECT_EQ(VA[u.first] * VA[u.second] * ((u.first > u.second) ? 2 : 1),
EEV->EA);
auto Pred = [&](const EVT &EV) { return EV.first == u; };
- EXPECT_NE(G.edges().end(),
- std::find_if(G.edges().begin(), G.edges().end(), Pred));
+ EXPECT_NE(G.edges().end(), llvm::find_if(G.edges(), Pred));
consumeError(EEV.takeError());
}
|
shiltian
approved these changes
May 17, 2025
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Jun 6, 2025
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