Skip to content

[CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo #140896

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
May 22, 2025
Merged

[CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo #140896

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
8add945
[CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo
Pierre-vh May 21, 2025
7dc163c
reorder fields
Pierre-vh May 22, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 3 additions & 0 deletions llvm/include/llvm/CodeGen/TargetLowering.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1228,6 +1228,9 @@ class TargetLoweringBase {
MaybeAlign align = Align(1); // alignment

MachineMemOperand::Flags flags = MachineMemOperand::MONone;
SyncScope::ID ssid = SyncScope::System;
AtomicOrdering order = AtomicOrdering::NotAtomic;
AtomicOrdering failureOrder = AtomicOrdering::NotAtomic;
IntrinsicInfo() = default;
};

Expand Down
5 changes: 3 additions & 2 deletions llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2847,8 +2847,9 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
MPI = MachinePointerInfo(Info.ptrVal, Info.offset);
else if (Info.fallbackAddressSpace)
MPI = MachinePointerInfo(*Info.fallbackAddressSpace);
MIB.addMemOperand(
MF->getMachineMemOperand(MPI, Info.flags, MemTy, Alignment, CI.getAAMetadata()));
MIB.addMemOperand(MF->getMachineMemOperand(
MPI, Info.flags, MemTy, Alignment, CI.getAAMetadata(),
/*Ranges=*/nullptr, Info.ssid, Info.order, Info.failureOrder));
}

if (CI.isConvergent()) {
Expand Down
13 changes: 10 additions & 3 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -5305,9 +5305,16 @@ void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I,
MPI = MachinePointerInfo(Info.ptrVal, Info.offset);
else if (Info.fallbackAddressSpace)
MPI = MachinePointerInfo(*Info.fallbackAddressSpace);
Result = DAG.getMemIntrinsicNode(
Info.opc, getCurSDLoc(), VTs, Ops, Info.memVT, MPI, Info.align,
Info.flags, LocationSize::precise(Info.size), I.getAAMetadata());
EVT MemVT = Info.memVT;
LocationSize Size = LocationSize::precise(Info.size);
if (Size.hasValue() && !Size.getValue())
Size = LocationSize::precise(MemVT.getStoreSize());
Comment on lines +5310 to +5311
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I don't understand why you need to do anything related to the size here

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This is borrowed from SelectionDAG::getMemIntrinsicNode. Without it, I get size mismatches because there is an expectation that the value is initialized if it's zero.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I think this whole API needs an overhaul, it's a collection of hacking around making changes to existing implementations. It would be better if LocationSize was directly constructed from MemVT in the first place

Align Alignment = Info.align.value_or(DAG.getEVTAlign(MemVT));
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

MaybeAlign should not exist. Particularly in this case, where the MaybeAlign is initialized to a concrete Align(1)

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Some targets use .reset() to make TLI infer the size based on memVT
AMDGPU, NVPTX and AArch64 all do it

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Which just shouldn't be done

MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
MPI, Info.flags, Size, Alignment, I.getAAMetadata(), /*Ranges=*/nullptr,
Info.ssid, Info.order, Info.failureOrder);
Result =
DAG.getMemIntrinsicNode(Info.opc, getCurSDLoc(), VTs, Ops, MemVT, MMO);
} else if (!HasChain) {
Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, getCurSDLoc(), VTs, Ops);
} else if (!I.getType()->isVoidTy()) {
Expand Down
Loading