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[AMDGPU] Remove duplicated/confusing helpers. NFCI #142598

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merged 3 commits into from
Jun 5, 2025
Merged

[AMDGPU] Remove duplicated/confusing helpers. NFCI #142598

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84692ce
[AMDGPU] Remove duplicated/confusing helpers. NFCI
rovka Jun 3, 2025
fe7dfa5
Move all CC helpers to header + constexpr
rovka Jun 4, 2025
d53435b
Braces
rovka Jun 4, 2025
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24 changes: 5 additions & 19 deletions llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1090,22 +1090,6 @@ bool AMDGPUCallLowering::areCalleeOutgoingArgsTailCallable(
return parametersInCSRMatch(MRI, CallerPreservedMask, OutLocs, OutArgs);
}

/// Return true if the calling convention is one that we can guarantee TCO for.
static bool canGuaranteeTCO(CallingConv::ID CC) {
return CC == CallingConv::Fast;
}

/// Return true if we might ever do TCO for calls with this calling convention.
static bool mayTailCallThisCC(CallingConv::ID CC) {
switch (CC) {
case CallingConv::C:
case CallingConv::AMDGPU_Gfx:
return true;
default:
return canGuaranteeTCO(CC);
}
}

bool AMDGPUCallLowering::isEligibleForTailCallOptimization(
MachineIRBuilder &B, CallLoweringInfo &Info,
SmallVectorImpl<ArgInfo> &InArgs, SmallVectorImpl<ArgInfo> &OutArgs) const {
Expand All @@ -1130,7 +1114,7 @@ bool AMDGPUCallLowering::isEligibleForTailCallOptimization(
if (!CallerPreserved)
return false;

if (!mayTailCallThisCC(CalleeCC)) {
if (!AMDGPU::mayTailCallThisCC(CalleeCC)) {
LLVM_DEBUG(dbgs() << "... Calling convention cannot be tail called.\n");
return false;
}
Expand All @@ -1144,8 +1128,10 @@ bool AMDGPUCallLowering::isEligibleForTailCallOptimization(
}

// If we have -tailcallopt, then we're done.
if (MF.getTarget().Options.GuaranteedTailCallOpt)
return canGuaranteeTCO(CalleeCC) && CalleeCC == CallerF.getCallingConv();
if (MF.getTarget().Options.GuaranteedTailCallOpt) {
return AMDGPU::canGuaranteeTCO(CalleeCC) &&
CalleeCC == CallerF.getCallingConv();
}

// Verify that the incoming and outgoing arguments from the callee are
// safe to tail call.
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7 changes: 0 additions & 7 deletions llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
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Expand Up @@ -125,13 +125,6 @@ void getUsesOfLDSByFunction(const CallGraph &CG, Module &M,
}

bool isKernelLDS(const Function *F) {
// Some weirdness here. AMDGPU::isKernelCC does not call into
// AMDGPU::isKernel with the calling conv, it instead calls into
// isModuleEntryFunction which returns true for more calling conventions
// than AMDGPU::isKernel does. There's a FIXME on AMDGPU::isKernel.
// There's also a test that checks that the LDS lowering does not hit on
// a graphics shader, denoted amdgpu_ps, so stay with the limited case.
// Putting LDS in the name of the function to draw attention to this.
return AMDGPU::isKernel(F->getCallingConv());
}

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4 changes: 3 additions & 1 deletion llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
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Expand Up @@ -978,7 +978,9 @@ bool AMDGPUTargetMachine::isNoopAddrSpaceCast(unsigned SrcAS,

unsigned AMDGPUTargetMachine::getAssumedAddrSpace(const Value *V) const {
if (auto *Arg = dyn_cast<Argument>(V);
Arg && AMDGPU::isKernelCC(Arg->getParent()) && !Arg->hasByRefAttr())
Arg &&
AMDGPU::isModuleEntryFunctionCC(Arg->getParent()->getCallingConv()) &&
!Arg->hasByRefAttr())
Comment on lines +981 to +983
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This is a functionality change which ideally would be tested

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It's not intended to be a functionality change, I only inlined isKernelCC's confusing implementation...

return AMDGPUAS::GLOBAL_ADDRESS;

const auto *LD = dyn_cast<LoadInst>(V);
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19 changes: 2 additions & 17 deletions llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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Expand Up @@ -3574,21 +3574,6 @@ void SITargetLowering::passSpecialInputs(
}
}

static bool canGuaranteeTCO(CallingConv::ID CC) {
return CC == CallingConv::Fast;
}

/// Return true if we might ever do TCO for calls with this calling convention.
static bool mayTailCallThisCC(CallingConv::ID CC) {
switch (CC) {
case CallingConv::C:
case CallingConv::AMDGPU_Gfx:
return true;
default:
return canGuaranteeTCO(CC);
}
}

bool SITargetLowering::isEligibleForTailCallOptimization(
SDValue Callee, CallingConv::ID CalleeCC, bool IsVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
Expand All @@ -3597,7 +3582,7 @@ bool SITargetLowering::isEligibleForTailCallOptimization(
if (AMDGPU::isChainCC(CalleeCC))
return true;

if (!mayTailCallThisCC(CalleeCC))
if (!AMDGPU::mayTailCallThisCC(CalleeCC))
return false;

// For a divergent call target, we need to do a waterfall loop over the
Expand All @@ -3619,7 +3604,7 @@ bool SITargetLowering::isEligibleForTailCallOptimization(
bool CCMatch = CallerCC == CalleeCC;

if (DAG.getTarget().Options.GuaranteedTailCallOpt) {
if (canGuaranteeTCO(CalleeCC) && CCMatch)
if (AMDGPU::canGuaranteeTCO(CalleeCC) && CCMatch)
return true;
return false;
}
Expand Down
65 changes: 0 additions & 65 deletions llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
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Expand Up @@ -2124,71 +2124,6 @@ bool getHasDepthExport(const Function &F) {
return F.getFnAttributeAsParsedInteger("amdgpu-depth-export", 0) != 0;
}

bool isShader(CallingConv::ID cc) {
switch (cc) {
case CallingConv::AMDGPU_VS:
case CallingConv::AMDGPU_LS:
case CallingConv::AMDGPU_HS:
case CallingConv::AMDGPU_ES:
case CallingConv::AMDGPU_GS:
case CallingConv::AMDGPU_PS:
case CallingConv::AMDGPU_CS_Chain:
case CallingConv::AMDGPU_CS_ChainPreserve:
case CallingConv::AMDGPU_CS:
return true;
default:
return false;
}
}

bool isGraphics(CallingConv::ID cc) {
return isShader(cc) || cc == CallingConv::AMDGPU_Gfx;
}

bool isCompute(CallingConv::ID cc) {
return !isGraphics(cc) || cc == CallingConv::AMDGPU_CS;
}

bool isEntryFunctionCC(CallingConv::ID CC) {
switch (CC) {
case CallingConv::AMDGPU_KERNEL:
case CallingConv::SPIR_KERNEL:
case CallingConv::AMDGPU_VS:
case CallingConv::AMDGPU_GS:
case CallingConv::AMDGPU_PS:
case CallingConv::AMDGPU_CS:
case CallingConv::AMDGPU_ES:
case CallingConv::AMDGPU_HS:
case CallingConv::AMDGPU_LS:
return true;
default:
return false;
}
}

bool isModuleEntryFunctionCC(CallingConv::ID CC) {
switch (CC) {
case CallingConv::AMDGPU_Gfx:
return true;
default:
return isEntryFunctionCC(CC) || isChainCC(CC);
}
}

bool isChainCC(CallingConv::ID CC) {
switch (CC) {
case CallingConv::AMDGPU_CS_Chain:
case CallingConv::AMDGPU_CS_ChainPreserve:
return true;
default:
return false;
}
}

bool isKernelCC(const Function *Func) {
return AMDGPU::isModuleEntryFunctionCC(Func->getCallingConv());
}

bool hasXNACK(const MCSubtargetInfo &STI) {
return STI.hasFeature(AMDGPU::FeatureXNACK);
}
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87 changes: 75 additions & 12 deletions llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
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Expand Up @@ -1306,16 +1306,61 @@ bool getHasColorExport(const Function &F);
bool getHasDepthExport(const Function &F);

LLVM_READNONE
bool isShader(CallingConv::ID CC);
constexpr bool isShader(CallingConv::ID CC) {
switch (CC) {
case CallingConv::AMDGPU_VS:
case CallingConv::AMDGPU_LS:
case CallingConv::AMDGPU_HS:
case CallingConv::AMDGPU_ES:
case CallingConv::AMDGPU_GS:
case CallingConv::AMDGPU_PS:
case CallingConv::AMDGPU_CS_Chain:
case CallingConv::AMDGPU_CS_ChainPreserve:
case CallingConv::AMDGPU_CS:
return true;
default:
return false;
}
}

LLVM_READNONE
bool isGraphics(CallingConv::ID CC);
constexpr bool isGraphics(CallingConv::ID CC) {
return isShader(CC) || CC == CallingConv::AMDGPU_Gfx;
}

LLVM_READNONE
bool isCompute(CallingConv::ID CC);
constexpr bool isCompute(CallingConv::ID CC) {
return !isGraphics(CC) || CC == CallingConv::AMDGPU_CS;
}

LLVM_READNONE
bool isEntryFunctionCC(CallingConv::ID CC);
constexpr bool isEntryFunctionCC(CallingConv::ID CC) {
switch (CC) {
case CallingConv::AMDGPU_KERNEL:
case CallingConv::SPIR_KERNEL:
case CallingConv::AMDGPU_VS:
case CallingConv::AMDGPU_GS:
case CallingConv::AMDGPU_PS:
case CallingConv::AMDGPU_CS:
case CallingConv::AMDGPU_ES:
case CallingConv::AMDGPU_HS:
case CallingConv::AMDGPU_LS:
return true;
default:
return false;
}
}

LLVM_READNONE
constexpr bool isChainCC(CallingConv::ID CC) {
switch (CC) {
case CallingConv::AMDGPU_CS_Chain:
case CallingConv::AMDGPU_CS_ChainPreserve:
return true;
default:
return false;
}
}

// These functions are considered entrypoints into the current module, i.e. they
// are allowed to be called from outside the current module. This is different
Expand All @@ -1324,16 +1369,17 @@ bool isEntryFunctionCC(CallingConv::ID CC);
// include functions that can be called from other functions inside or outside
// the current module. Module entry functions are allowed to allocate LDS.
LLVM_READNONE
bool isModuleEntryFunctionCC(CallingConv::ID CC);

LLVM_READNONE
bool isChainCC(CallingConv::ID CC);

bool isKernelCC(const Function *Func);
constexpr bool isModuleEntryFunctionCC(CallingConv::ID CC) {
switch (CC) {
case CallingConv::AMDGPU_Gfx:
return true;
default:
return isEntryFunctionCC(CC) || isChainCC(CC);
}
}

// FIXME: Remove this when calling conventions cleaned up
LLVM_READNONE
inline bool isKernel(CallingConv::ID CC) {
constexpr inline bool isKernel(CallingConv::ID CC) {
switch (CC) {
case CallingConv::AMDGPU_KERNEL:
case CallingConv::SPIR_KERNEL:
Expand All @@ -1343,6 +1389,23 @@ inline bool isKernel(CallingConv::ID CC) {
}
}

LLVM_READNONE
constexpr bool canGuaranteeTCO(CallingConv::ID CC) {
return CC == CallingConv::Fast;
}

/// Return true if we might ever do TCO for calls with this calling convention.
LLVM_READNONE
constexpr bool mayTailCallThisCC(CallingConv::ID CC) {
switch (CC) {
case CallingConv::C:
case CallingConv::AMDGPU_Gfx:
return true;
default:
return canGuaranteeTCO(CC);
}
}

bool hasXNACK(const MCSubtargetInfo &STI);
bool hasSRAMECC(const MCSubtargetInfo &STI);
bool hasMIMG_R128(const MCSubtargetInfo &STI);
Expand Down
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