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[mlir] Ensure newline at the end of files (NFC) #143155

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2 changes: 1 addition & 1 deletion mlir/lib/Dialect/Tensor/Extensions/AllExtensions.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -13,4 +13,4 @@ using namespace mlir;

void mlir::tensor::registerAllExtensions(DialectRegistry &registry) {
registerShardingInterfaceExternalModels(registry);
}
}
2 changes: 1 addition & 1 deletion mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -344,4 +344,4 @@ struct TosaInferShapes
validateSameOperandsAndResultRankTrait(func.getBody());
}
};
} // namespace
} // namespace
2 changes: 1 addition & 1 deletion mlir/lib/Reducer/OptReductionPass.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -88,4 +88,4 @@ void OptReductionPass::runOnOperation() {
moduleVariant->destroy();

LLVM_DEBUG(llvm::dbgs() << "Pass Complete\n\n");
}
}
2 changes: 1 addition & 1 deletion mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -121,4 +121,4 @@ void registerTestXeGPULowerings() {
PassRegistration<TestXeGPUUnrollingPatterns>();
}
} // namespace test
} // namespace mlir
} // namespace mlir
Original file line number Diff line number Diff line change
Expand Up @@ -137,4 +137,4 @@ TEST(QuasiPolynomialTest, simplify) {
{{{Fraction(1, 1), Fraction(3, 4), Fraction(5, 3)},
{Fraction(2, 1), Fraction(0, 1), Fraction(0, 1)}},
{{Fraction(1, 1), Fraction(4, 5), Fraction(6, 5)}}}));
}
}
2 changes: 1 addition & 1 deletion mlir/unittests/Target/LLVM/SerializeToLLVMBitcode.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -239,4 +239,4 @@ TEST_F(MLIRTargetLLVM,
ASSERT_TRUE(serializedBinary != std::nullopt);
ASSERT_TRUE(!serializedBinary->empty());
ASSERT_TRUE(!optimizedLLVMIR.empty());
}
}
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