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[AMDGPU] Autogenerate dst bytesel asm. NFCI. #143429

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Jun 9, 2025
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[AMDGPU] Autogenerate dst bytesel asm. NFCI. #143429

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7da91b5
[AMDGPU] Fix getAsmVOP3Base SrcMods arguments. NFCI.
rampitec Jun 9, 2025
3c462dc
[AMDGPU] Autogenerate dst bytesel asm. NFCI.
rampitec Jun 9, 2025
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22 changes: 14 additions & 8 deletions llvm/lib/Target/AMDGPU/SIInstrInfo.td
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Original file line number Diff line number Diff line change
Expand Up @@ -2034,11 +2034,13 @@ class getInsVOP3P <RegisterOperand Src0RC, RegisterOperand Src1RC,
class getInsVOP3OpSel <RegisterOperand Src0RC, RegisterOperand Src1RC,
RegisterOperand Src2RC, int NumSrcArgs,
bit HasClamp, bit HasOMod,
Operand Src0Mod, Operand Src1Mod, Operand Src2Mod> {
Operand Src0Mod, Operand Src1Mod, Operand Src2Mod,
bit HasFP8ByteSel = 0, bit HasFP8DstByteSel = 0> {
dag ret = getInsVOP3Base<Src0RC, Src1RC,
Src2RC, NumSrcArgs,
HasClamp, 1/*HasModifiers*/, 1/*HasSrc2Mods*/, HasOMod,
Src0Mod, Src1Mod, Src2Mod, /*HasOpSel=*/1>.ret;
Src0Mod, Src1Mod, Src2Mod, /*HasOpSel=*/1,
HasFP8ByteSel, HasFP8DstByteSel>.ret;
}

class getInsDPPBase <RegisterOperand OldRC, RegisterOperand Src0RC, RegisterOperand Src1RC,
Expand Down Expand Up @@ -2244,7 +2246,8 @@ class getAsmVOP3OpSel <int NumSrcArgs,
bit HasOMod,
bit Src0HasMods,
bit Src1HasMods,
bit Src2HasMods> {
bit Src2HasMods,
bit HasByteSel = 0> {
string dst = "$vdst";

string isrc0 = !if(!eq(NumSrcArgs, 1), "$src0", "$src0,");
Expand All @@ -2263,9 +2266,10 @@ class getAsmVOP3OpSel <int NumSrcArgs,
string src1 = !if(Src1HasMods, fsrc1, isrc1);
string src2 = !if(Src2HasMods, fsrc2, isrc2);

string bytesel = !if(HasByteSel, "$byte_sel", "");
string clamp = !if(HasClamp, "$clamp", "");
string omod = !if(HasOMod, "$omod", "");
string ret = dst#", "#src0#src1#src2#"$op_sel"#clamp#omod;
string ret = dst#", "#src0#src1#src2#"$op_sel"#bytesel#clamp#omod;
}

class getAsmDPP <bit HasDst, int NumSrcArgs, bit HasModifiers, ValueType DstVT = i32> {
Expand Down Expand Up @@ -2630,7 +2634,8 @@ class VOPProfile <list<ValueType> _ArgVT, bit _EnableClamp = 0> {
Src0PackedMod, Src1PackedMod, Src2PackedMod>.ret;
field dag InsVOP3OpSel = getInsVOP3OpSel<Src0RC64, Src1RC64, Src2RC64,
NumSrcArgs, HasClamp, HasOMod,
Src0Mod, Src1Mod, Src2Mod>.ret;
Src0Mod, Src1Mod, Src2Mod,
HasFP8ByteSel, HasFP8DstByteSel>.ret;
field dag InsDPP = !if(HasExtDPP,
getInsDPP<DstRCDPP, Src0DPP, Src1DPP, Src2DPP, NumSrcArgs,
HasModifiers, Src0ModDPP, Src1ModDPP, Src2ModDPP>.ret,
Expand Down Expand Up @@ -2671,16 +2676,17 @@ class VOPProfile <list<ValueType> _ArgVT, bit _EnableClamp = 0> {
// the asm operand name via this HasModifiers flag
field string AsmDPP8 = getAsmDPP8<HasDst, NumSrcArgs, 0 /*HasModifiers*/, DstVT>.ret;
field string AsmVOP3Base = getAsmVOP3Base<NumSrcArgs, HasDst, HasClamp,
HasOpSel, HasOMod, IsVOP3P, HasNeg, HasModifiers, HasModifiers,
HasModifiers, DstVT, HasFP8ByteSel>.ret;
HasOpSel, HasOMod, IsVOP3P, HasNeg, HasSrc0Mods, HasSrc1Mods,
HasSrc2Mods, DstVT, HasFP8ByteSel>.ret;
field string Asm64 = AsmVOP3Base;
field string AsmVOP3P = getAsmVOP3P<HasDst, NumSrcArgs, HasNeg, HasClamp, HasOpSel>.ret;
field string AsmVOP3OpSel = getAsmVOP3OpSel<NumSrcArgs,
HasClamp,
HasOMod,
HasSrc0FloatMods,
HasSrc1FloatMods,
HasSrc2FloatMods>.ret;
HasSrc2FloatMods,
HasFP8ByteSel>.ret;
field string AsmVOP3DPP = getAsmVOP3DPP<AsmVOP3Base>.ret;
field string AsmVOP3DPP16 = getAsmVOP3DPP16<AsmVOP3Base>.ret;
field string AsmVOP3DPP8 = getAsmVOP3DPP8<AsmVOP3Base>.ret;
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/Target/AMDGPU/VOP3Instructions.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1055,6 +1055,7 @@ class VOP3_CVT_SCALE_FP4FP8BF8_F32_TiedInput_Profile<VOPProfile P> : VOP3_Profil

class VOP3_CVT_SCALE_FP4_F32_TiedInput_Profile<VOPProfile P> : VOP3_CVT_SCALE_FP4FP8BF8_F32_TiedInput_Profile<P> {
let HasFP8DstByteSel = 1;
let HasFP8ByteSel = 0; // It works as a dst-bytesel, but does not have byte_sel operand.
}

class VOP3_CVT_SCALE_SR_F8BF8_F16BF16F32_TiedInput_Profile<VOPProfile P> : VOP3_CVT_SCALE_FP4FP8BF8_F32_TiedInput_Profile<P> {
Expand All @@ -1063,6 +1064,7 @@ class VOP3_CVT_SCALE_SR_F8BF8_F16BF16F32_TiedInput_Profile<VOPProfile P> : VOP3_
FP32InputMods:$src2_modifiers, Src2RC64:$src2,
VGPR_32:$vdst_in, op_sel0:$op_sel);
let HasFP8DstByteSel = 1;
let HasFP8ByteSel = 0; // It works as a dst-bytesel, but does not have byte_sel operand.
}


Expand Down
9 changes: 9 additions & 0 deletions llvm/lib/Target/AMDGPU/VOPInstructions.td
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Expand Up @@ -1478,6 +1478,9 @@ class VOP3_Profile_Base<VOPProfile P, VOP3Features Features = VOP3_REGULAR> : VO
let HasOpSel = !if(Features.HasOpSel, 1, P.HasOpSel);
let IsMAI = !if(Features.IsMAI, 1, P.IsMAI);
let IsPacked = !if(Features.IsPacked, 1, P.IsPacked);
let HasFP8SrcByteSel = P.HasFP8SrcByteSel;
let HasFP8DstByteSel = P.HasFP8DstByteSel;
let HasOMod = P.HasOMod;

let HasModifiers =
!if (Features.IsMAI, 0,
Expand All @@ -1494,6 +1497,9 @@ class VOP3_Profile_True16<VOPProfile P, VOP3Features Features = VOP3_REGULAR> :
let HasOpSel = !if(Features.HasOpSel, 1, P.HasOpSel);
let IsMAI = !if(Features.IsMAI, 1, P.IsMAI);
let IsPacked = !if(Features.IsPacked, 1, P.IsPacked);
let HasFP8SrcByteSel = P.HasFP8SrcByteSel;
let HasFP8DstByteSel = P.HasFP8DstByteSel;
let HasOMod = P.HasOMod;

let HasModifiers =
!if (Features.IsMAI, 0,
Expand All @@ -1506,6 +1512,9 @@ class VOP3_Profile_Fake16<VOPProfile P, VOP3Features Features = VOP3_REGULAR> :
let HasOpSel = !if(Features.HasOpSel, 1, P.HasOpSel);
let IsMAI = !if(Features.IsMAI, 1, P.IsMAI);
let IsPacked = !if(Features.IsPacked, 1, P.IsPacked);
let HasFP8SrcByteSel = P.HasFP8SrcByteSel;
let HasFP8DstByteSel = P.HasFP8DstByteSel;
let HasOMod = P.HasOMod;

let HasModifiers =
!if (Features.IsMAI, 0,
Expand Down
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