[DAG] getNode - assert that INSERT_VECTOR_ELT operand types are legal #143502
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Helped track down a typo in the X86ISD::CVTPH2PS lowering.
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@llvm/pr-subscribers-backend-x86 @llvm/pr-subscribers-llvm-selectiondag Author: Simon Pilgrim (RKSimon) ChangesHelped track down a typo in the X86ISD::CVTPH2PS lowering. Full diff: https://github.com/llvm/llvm-project/pull/143502.diff 2 Files Affected:
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 049c24288344d..4fc026ca562ba 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -7896,7 +7896,18 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
break;
}
case ISD::INSERT_VECTOR_ELT: {
- ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3);
+ assert(VT.isVector() && VT == N1.getValueType() &&
+ "INSERT_VECTOR_ELT vector type mismatch");
+ assert(VT.isFloatingPoint() == N2.getValueType().isFloatingPoint() &&
+ "INSERT_VECTOR_ELT scalar fp/int mismatch");
+ assert((!VT.isFloatingPoint() ||
+ VT.getVectorElementType() == N2.getValueType()) &&
+ "INSERT_VECTOR_ELT fp scalar type mismatch");
+ assert((!VT.isInteger() ||
+ VT.getScalarSizeInBits() <= N2.getScalarValueSizeInBits()) &&
+ "INSERT_VECTOR_ELT int scalar size mismatch");
+
+ auto *N3C = dyn_cast<ConstantSDNode>(N3);
// INSERT_VECTOR_ELT into out-of-bounds element is an UNDEF, except
// for scalable vectors where we will generate appropriate code to
// deal with out-of-bounds cases correctly.
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index b34215b316128..4a7520911737d 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -22234,7 +22234,7 @@ SDValue X86TargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
} else {
In = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, In);
In = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, MVT::v4i32,
- DAG.getUNDEF(MVT::v4f32), In,
+ DAG.getUNDEF(MVT::v4i32), In,
DAG.getVectorIdxConstant(0, DL));
In = DAG.getBitcast(MVT::v8i16, In);
Res = DAG.getNode(X86ISD::CVTPH2PS, DL, MVT::v4f32, In,
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phoebewang
approved these changes
Jun 10, 2025
| @@ -22234,7 +22234,7 @@ SDValue X86TargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const { | |||
| } else { | |||
| In = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, In); | |||
| In = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, MVT::v4i32, | |||
| DAG.getUNDEF(MVT::v4f32), In, | |||
| DAG.getUNDEF(MVT::v4i32), In, | |||
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/55/builds/12589 Here is the relevant piece of the build log for the reference |
rorth
pushed a commit
to rorth/llvm-project
that referenced
this pull request
Jun 11, 2025
…llvm#143502) Helped track down a typo in the X86ISD::CVTPH2PS lowering.
tomtor
pushed a commit
to tomtor/llvm-project
that referenced
this pull request
Jun 14, 2025
…llvm#143502) Helped track down a typo in the X86ISD::CVTPH2PS lowering.
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Helped track down a typo in the X86ISD::CVTPH2PS lowering.