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[PowerPC] eliminate RLWINM instruction following LBARX as possible #144089

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Merged
merged 3 commits into from
Jun 25, 2025
Merged

[PowerPC] eliminate RLWINM instruction following LBARX as possible #144089

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fc8753b
conbine LBARX and RLWINM
diggerlin Jun 2, 2025
a9a7c4d
address comment
diggerlin Jun 20, 2025
5132a2a
address comment
diggerlin Jun 20, 2025
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15 changes: 15 additions & 0 deletions llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4961,6 +4961,21 @@ bool PPCDAGToDAGISel::tryAsSingleRLWINM(SDNode *N) {
// If this is just a masked value where the input is not handled, and
// is not a rotate-left (handled by a pattern in the .td file), emit rlwinm
if (isRunOfOnes(Imm, MB, ME) && Val.getOpcode() != ISD::ROTL) {
// The result of LBARX/LHARX do not need to be cleared as the instructions
// implicitly clear the upper bits.
unsigned AlreadyCleared = 0;
if (Val.getOpcode() == ISD::INTRINSIC_W_CHAIN) {
auto IntrinsicID = Val.getConstantOperandVal(1);
if (IntrinsicID == Intrinsic::ppc_lbarx)
AlreadyCleared = 24;
else if (IntrinsicID == Intrinsic::ppc_lharx)
AlreadyCleared = 16;
if (AlreadyCleared != 0 && AlreadyCleared == MB && ME == 31) {
ReplaceUses(SDValue(N, 0), N->getOperand(0));
return true;
}
}

SDValue Ops[] = {Val, getI32Imm(0, dl), getI32Imm(MB, dl),
getI32Imm(ME, dl)};
CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops);
Expand Down
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
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Expand Up @@ -18,7 +18,6 @@ define signext i32 @main() nounwind {
; CHECK-NEXT: sth 3, 46(1)
; CHECK-NEXT: addi 3, 1, 46
; CHECK-NEXT: lharx 4, 0, 3
; CHECK-NEXT: clrlwi 4, 4, 16
; CHECK-NEXT: cmplwi 4, 33059
; CHECK-NEXT: bne 0, .LBB0_4
; CHECK-NEXT: # %bb.1: # %cmpxchg.fencedstore
Expand All @@ -32,7 +31,6 @@ define signext i32 @main() nounwind {
; CHECK-NEXT: # %bb.3: # %cmpxchg.releasedload
; CHECK-NEXT: #
; CHECK-NEXT: lharx 5, 0, 3
; CHECK-NEXT: clrlwi 5, 5, 16
; CHECK-NEXT: cmplwi 5, 33059
; CHECK-NEXT: beq 0, .LBB0_2
; CHECK-NEXT: .LBB0_4: # %cmpxchg.nostore
Expand Down
32 changes: 8 additions & 24 deletions llvm/test/CodeGen/PowerPC/all-atomics.ll
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Expand Up @@ -4346,8 +4346,7 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: lbz 7, uc@toc@l(3)
; CHECK-NEXT: lbz 8, sc@toc@l(4)
; CHECK-NEXT: lbarx 5, 0, 6
; CHECK-NEXT: clrlwi 9, 5, 24
; CHECK-NEXT: cmplw 9, 7
; CHECK-NEXT: cmplw 5, 7
; CHECK-NEXT: bne 0, .LBB3_4
; CHECK-NEXT: # %bb.1: # %cmpxchg.fencedstore276
; CHECK-NEXT: sync
Expand All @@ -4359,17 +4358,15 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.3: # %cmpxchg.releasedload274
; CHECK-NEXT: #
; CHECK-NEXT: lbarx 5, 0, 6
; CHECK-NEXT: clrlwi 9, 5, 24
; CHECK-NEXT: cmplw 9, 7
; CHECK-NEXT: cmplw 5, 7
; CHECK-NEXT: beq 0, .LBB3_2
; CHECK-NEXT: .LBB3_4: # %cmpxchg.nostore272
; CHECK-NEXT: addi 7, 3, uc@toc@l
; CHECK-NEXT: lwsync
; CHECK-NEXT: stb 5, sc@toc@l(4)
; CHECK-NEXT: lbz 9, uc@toc@l(3)
; CHECK-NEXT: lbarx 8, 0, 7
; CHECK-NEXT: clrlwi 10, 8, 24
; CHECK-NEXT: cmplw 10, 9
; CHECK-NEXT: cmplw 8, 9
; CHECK-NEXT: bne 0, .LBB3_8
; CHECK-NEXT: # %bb.5: # %cmpxchg.fencedstore257
; CHECK-NEXT: sync
Expand All @@ -4382,8 +4379,7 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.7: # %cmpxchg.releasedload255
; CHECK-NEXT: #
; CHECK-NEXT: lbarx 8, 0, 7
; CHECK-NEXT: clrlwi 10, 8, 24
; CHECK-NEXT: cmplw 10, 9
; CHECK-NEXT: cmplw 8, 9
; CHECK-NEXT: beq 0, .LBB3_6
; CHECK-NEXT: .LBB3_8: # %cmpxchg.nostore253
; CHECK-NEXT: addis 5, 2, ss@toc@ha
Expand All @@ -4393,8 +4389,7 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: lbz 11, sc@toc@l(4)
; CHECK-NEXT: addi 8, 5, ss@toc@l
; CHECK-NEXT: lharx 9, 0, 8
; CHECK-NEXT: clrlwi 12, 9, 16
; CHECK-NEXT: cmplw 12, 10
; CHECK-NEXT: cmplw 9, 10
; CHECK-NEXT: bne 0, .LBB3_12
; CHECK-NEXT: # %bb.9: # %cmpxchg.fencedstore238
; CHECK-NEXT: extsb 11, 11
Expand All @@ -4408,8 +4403,7 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.11: # %cmpxchg.releasedload236
; CHECK-NEXT: #
; CHECK-NEXT: lharx 9, 0, 8
; CHECK-NEXT: clrlwi 12, 9, 16
; CHECK-NEXT: cmplw 12, 10
; CHECK-NEXT: cmplw 9, 10
; CHECK-NEXT: beq 0, .LBB3_10
; CHECK-NEXT: .LBB3_12: # %cmpxchg.nostore234
; CHECK-NEXT: lwsync
Expand All @@ -4419,8 +4413,7 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: lbz 12, sc@toc@l(4)
; CHECK-NEXT: addi 9, 5, us@toc@l
; CHECK-NEXT: lharx 10, 0, 9
; CHECK-NEXT: clrlwi 0, 10, 16
; CHECK-NEXT: cmplw 0, 11
; CHECK-NEXT: cmplw 10, 11
; CHECK-NEXT: bne 0, .LBB3_16
; CHECK-NEXT: # %bb.13: # %cmpxchg.fencedstore219
; CHECK-NEXT: extsb 12, 12
Expand All @@ -4434,8 +4427,7 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.15: # %cmpxchg.releasedload217
; CHECK-NEXT: #
; CHECK-NEXT: lharx 10, 0, 9
; CHECK-NEXT: clrlwi 0, 10, 16
; CHECK-NEXT: cmplw 0, 11
; CHECK-NEXT: cmplw 10, 11
; CHECK-NEXT: beq 0, .LBB3_14
; CHECK-NEXT: .LBB3_16: # %cmpxchg.nostore215
; CHECK-NEXT: lwsync
Expand Down Expand Up @@ -4535,7 +4527,6 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: lbz 30, uc@toc@l(3)
; CHECK-NEXT: lbz 29, sc@toc@l(4)
; CHECK-NEXT: lbarx 28, 0, 6
; CHECK-NEXT: clrlwi 28, 28, 24
; CHECK-NEXT: cmplw 28, 30
; CHECK-NEXT: bne 0, .LBB3_36
; CHECK-NEXT: # %bb.33: # %cmpxchg.fencedstore124
Expand All @@ -4548,7 +4539,6 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.35: # %cmpxchg.releasedload122
; CHECK-NEXT: #
; CHECK-NEXT: lbarx 28, 0, 6
; CHECK-NEXT: clrlwi 28, 28, 24
; CHECK-NEXT: cmplw 28, 30
; CHECK-NEXT: beq 0, .LBB3_34
; CHECK-NEXT: .LBB3_36: # %cmpxchg.nostore120
Expand All @@ -4566,7 +4556,6 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: stw 6, ui@toc@l(5)
; CHECK-NEXT: lbz 6, uc@toc@l(3)
; CHECK-NEXT: lbarx 29, 0, 7
; CHECK-NEXT: clrlwi 29, 29, 24
; CHECK-NEXT: cmplw 29, 6
; CHECK-NEXT: bne 0, .LBB3_42
; CHECK-NEXT: # %bb.39: # %cmpxchg.fencedstore105
Expand All @@ -4579,7 +4568,6 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.41: # %cmpxchg.releasedload103
; CHECK-NEXT: #
; CHECK-NEXT: lbarx 29, 0, 7
; CHECK-NEXT: clrlwi 29, 29, 24
; CHECK-NEXT: cmplw 29, 6
; CHECK-NEXT: beq 0, .LBB3_40
; CHECK-NEXT: .LBB3_42: # %cmpxchg.nostore101
Expand All @@ -4597,7 +4585,6 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: stw 6, ui@toc@l(5)
; CHECK-NEXT: lbz 6, uc@toc@l(3)
; CHECK-NEXT: lharx 30, 0, 8
; CHECK-NEXT: clrlwi 30, 30, 16
; CHECK-NEXT: cmplw 30, 6
; CHECK-NEXT: bne 0, .LBB3_48
; CHECK-NEXT: # %bb.45: # %cmpxchg.fencedstore86
Expand All @@ -4612,7 +4599,6 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.47: # %cmpxchg.releasedload84
; CHECK-NEXT: #
; CHECK-NEXT: lharx 30, 0, 8
; CHECK-NEXT: clrlwi 30, 30, 16
; CHECK-NEXT: cmplw 30, 6
; CHECK-NEXT: beq 0, .LBB3_46
; CHECK-NEXT: .LBB3_48: # %cmpxchg.nostore82
Expand All @@ -4630,7 +4616,6 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: stw 6, ui@toc@l(5)
; CHECK-NEXT: lbz 6, uc@toc@l(3)
; CHECK-NEXT: lharx 8, 0, 9
; CHECK-NEXT: clrlwi 8, 8, 16
; CHECK-NEXT: cmplw 8, 6
; CHECK-NEXT: bne 0, .LBB3_54
; CHECK-NEXT: # %bb.51: # %cmpxchg.fencedstore67
Expand All @@ -4645,7 +4630,6 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.53: # %cmpxchg.releasedload65
; CHECK-NEXT: #
; CHECK-NEXT: lharx 8, 0, 9
; CHECK-NEXT: clrlwi 8, 8, 16
; CHECK-NEXT: cmplw 8, 6
; CHECK-NEXT: beq 0, .LBB3_52
; CHECK-NEXT: .LBB3_54: # %cmpxchg.nostore63
Expand Down
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