[DAG] Implement SDPatternMatch m_Abs() matcher

[Rajveer100]

Resolves #144474

[llvmbot]

@llvm/pr-subscribers-llvm-selectiondag

Author: Rajveer Singh Bharadwaj (Rajveer100)

Changes

Resolves #144474

---

Full diff: https://github.com/llvm/llvm-project/pull/144512.diff

3 Files Affected:

• (modified) llvm/include/llvm/CodeGen/SDPatternMatch.h (+4)
• (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+3-9)
• (modified) llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp (+4)

diff --git a/llvm/include/llvm/CodeGen/SDPatternMatch.h b/llvm/include/llvm/CodeGen/SDPatternMatch.h
index 2e3807a2dfffd..d413227c4d961 100644
--- a/llvm/include/llvm/CodeGen/SDPatternMatch.h
+++ b/llvm/include/llvm/CodeGen/SDPatternMatch.h
@@ -938,6 +938,10 @@ template <typename Opnd> inline UnaryOpc_match<Opnd> m_Trunc(const Opnd &Op) {
   return UnaryOpc_match<Opnd>(ISD::TRUNCATE, Op);
 }
 
+template <typename Opnd> inline UnaryOpc_match<Opnd> m_Abs(const Opnd &Op) {
+  return UnaryOpc_match<Opnd>(ISD::ABS, Op);
+}
+
 /// Match a zext or identity
 /// Allows to peek through optional extensions
 template <typename Opnd> inline auto m_ZExtOrSelf(const Opnd &Op) {
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 5d62ded171f4f..8d2d645bda8bd 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -11252,19 +11252,13 @@ SDValue DAGCombiner::foldABSToABD(SDNode *N, const SDLoc &DL) {
   if (N->getOpcode() == ISD::TRUNCATE)
     N = N->getOperand(0).getNode();
 
-  if (N->getOpcode() != ISD::ABS)
-    return SDValue();
-
   EVT VT = N->getValueType(0);
-  SDValue AbsOp1 = N->getOperand(0);
   SDValue Op0, Op1;
 
-  if (AbsOp1.getOpcode() != ISD::SUB)
+  if (!sd_match(N, m_Abs(m_Sub(m_Value(Op0), m_Value(Op1)))))
     return SDValue();
 
-  Op0 = AbsOp1.getOperand(0);
-  Op1 = AbsOp1.getOperand(1);
-
+  SDValue AbsOp0 = N->getOperand(0);
   unsigned Opc0 = Op0.getOpcode();
 
   // Check if the operands of the sub are (zero|sign)-extended.
@@ -11274,7 +11268,7 @@ SDValue DAGCombiner::foldABSToABD(SDNode *N, const SDLoc &DL) {
        Opc0 != ISD::SIGN_EXTEND_INREG)) {
     // fold (abs (sub nsw x, y)) -> abds(x, y)
     // Don't fold this for unsupported types as we lose the NSW handling.
-    if (AbsOp1->getFlags().hasNoSignedWrap() && hasOperation(ISD::ABDS, VT) &&
+    if (AbsOp0->getFlags().hasNoSignedWrap() && hasOperation(ISD::ABDS, VT) &&
         TLI.preferABDSToABSWithNSW(VT)) {
       SDValue ABD = DAG.getNode(ISD::ABDS, DL, VT, Op0, Op1);
       return DAG.getZExtOrTrunc(ABD, DL, SrcVT);
diff --git a/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp b/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
index 1b590aa33bd86..2162588aadfdb 100644
--- a/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
+++ b/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
@@ -388,6 +388,8 @@ TEST_F(SelectionDAGPatternMatchTest, matchUnaryOp) {
   SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op0);
   SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op1);
 
+  SDValue Abs = DAG->getNode(ISD::ABS, DL, Int32VT, Op0);
+
   SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Trunc, Op0);
   SDValue Neg = DAG->getNegative(Op0, DL, Int32VT);
   SDValue Not = DAG->getNOT(DL, Op0, Int32VT);
@@ -417,6 +419,8 @@ TEST_F(SelectionDAGPatternMatchTest, matchUnaryOp) {
   EXPECT_FALSE(sd_match(ZExt, m_SExtLike(m_Value())));
   EXPECT_TRUE(sd_match(Trunc, m_Trunc(m_Specific(Op1))));
 
+  EXPECT_TRUE(sd_match(Abs, m_Abs(m_Specific(Op0))));
+
   EXPECT_TRUE(sd_match(Neg, m_Neg(m_Value())));
   EXPECT_TRUE(sd_match(Not, m_Not(m_Value())));
   EXPECT_FALSE(sd_match(ZExt, m_Neg(m_Value())));

[Rajveer100]

CI is looking good.

[RKSimon]

LGTM - cheers

[llvm-ci]

LLVM Buildbot has detected a new failure on builder ml-opt-rel-x86-64 running on ml-opt-rel-x86-64-b2 while building llvm at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/185/builds/20383

Here is the relevant piece of the build log for the reference

Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: CodeGen/AMDGPU/GlobalISel/insertelement.ll' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/b/ml-opt-rel-x86-64-b1/build/bin/llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll | /b/ml-opt-rel-x86-64-b1/build/bin/FileCheck -check-prefix=GPRIDX /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll # RUN: at line 2
+ /b/ml-opt-rel-x86-64-b1/build/bin/llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs
+ /b/ml-opt-rel-x86-64-b1/build/bin/FileCheck -check-prefix=GPRIDX /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
/b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll:6514:16: error: GPRIDX-NEXT: is not on the line after the previous match
; GPRIDX-NEXT: s_load_dwordx16 s[12:27], s[8:9], 0x0
               ^
<stdin>:6451:2: note: 'next' match was here
 s_load_dwordx16 s[12:27], s[8:9], 0x0
 ^
<stdin>:6448:15: note: previous match ended here
; %bb.0: ; %bb
              ^
<stdin>:6449:1: note: non-matching line after previous match is here
 s_add_u32 flat_scratch_lo, s12, s17
^

Input file: <stdin>
Check file: /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll

-dump-input=help explains the following input dump.

Input was:
<<<<<<
           .
           .
           .
        6446:  runtime_loader_kernel_symbol = 0 
        6447:  .end_amd_kernel_code_t 
        6448: ; %bb.0: ; %bb 
        6449:  s_add_u32 flat_scratch_lo, s12, s17 
        6450:  s_addc_u32 flat_scratch_hi, s13, 0 
        6451:  s_load_dwordx16 s[12:27], s[8:9], 0x0 
next:6514      !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
        6452:  s_load_dwordx2 s[0:1], s[8:9], 0x40 
        6453:  s_waitcnt lgkmcnt(0) 
        6454:  s_lshr_b32 s2, s12, 1 
        6455:  s_and_b32 s2, s2, 1 
        6456:  s_lshl_b32 s2, s2, 1 
           .
           .
           .
>>>>>>

--

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