ARM: Move ABI helpers from Subtarget to TargetMachine #144680
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arsenm
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@llvm/pr-subscribers-backend-arm Author: Matt Arsenault (arsenm) ChangesThese are module level concepts, and attaching them to the Full diff: https://github.com/llvm/llvm-project/pull/144680.diff 9 Files Affected:
diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
index 1443747709b7a..2fd784373f4ad 100644
--- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -54,6 +54,10 @@ ARMAsmPrinter::ARMAsmPrinter(TargetMachine &TM,
: AsmPrinter(TM, std::move(Streamer), ID), Subtarget(nullptr), AFI(nullptr),
MCP(nullptr), InConstantPool(false), OptimizationGoals(-1) {}
+const ARMBaseTargetMachine &ARMAsmPrinter::getTM() const {
+ return static_cast<const ARMBaseTargetMachine &>(TM);
+}
+
void ARMAsmPrinter::emitFunctionBodyEnd() {
// Make sure to terminate any constant pools that were at the end
// of the function.
@@ -750,7 +754,7 @@ void ARMAsmPrinter::emitAttributes() {
ATS.emitAttribute(ARMBuildAttrs::ABI_align_preserved, 1);
// Hard float. Use both S and D registers and conform to AAPCS-VFP.
- if (STI.isAAPCS_ABI() && TM.Options.FloatABIType == FloatABI::Hard)
+ if (getTM().isAAPCS_ABI() && TM.Options.FloatABIType == FloatABI::Hard)
ATS.emitAttribute(ARMBuildAttrs::ABI_VFP_args, ARMBuildAttrs::HardFPAAPCS);
// FIXME: To support emitting this build attribute as GCC does, the
diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.h b/llvm/lib/Target/ARM/ARMAsmPrinter.h
index 8a7ec4e2bcf22..2b067c753264f 100644
--- a/llvm/lib/Target/ARM/ARMAsmPrinter.h
+++ b/llvm/lib/Target/ARM/ARMAsmPrinter.h
@@ -76,6 +76,8 @@ class LLVM_LIBRARY_VISIBILITY ARMAsmPrinter : public AsmPrinter {
return "ARM Assembly Printer";
}
+ const ARMBaseTargetMachine &getTM() const;
+
void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override;
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 765c65c5fcb24..06499a3945ee5 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -20,6 +20,7 @@
#include "ARMISelLowering.h"
#include "ARMMachineFunctionInfo.h"
#include "ARMSubtarget.h"
+#include "ARMTargetMachine.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMBaseInfo.h"
#include "Utils/ARMBaseInfo.h"
@@ -134,9 +135,9 @@ class ARMFastISel final : public FastISel {
/// make the right decision when generating code for different targets.
const ARMSubtarget *Subtarget;
Module &M;
- const TargetMachine &TM;
- const TargetInstrInfo &TII;
- const TargetLowering &TLI;
+ const ARMBaseInstrInfo &TII;
+ const ARMTargetLowering &TLI;
+ const ARMBaseTargetMachine &TM;
ARMFunctionInfo *AFI;
// Convenience variables to avoid some queries.
@@ -149,8 +150,8 @@ class ARMFastISel final : public FastISel {
: FastISel(funcInfo, libInfo),
Subtarget(&funcInfo.MF->getSubtarget<ARMSubtarget>()),
M(const_cast<Module &>(*funcInfo.Fn->getParent())),
- TM(funcInfo.MF->getTarget()), TII(*Subtarget->getInstrInfo()),
- TLI(*Subtarget->getTargetLowering()) {
+ TII(*Subtarget->getInstrInfo()), TLI(*Subtarget->getTargetLowering()),
+ TM(TLI.getTM()) {
AFI = funcInfo.MF->getInfo<ARMFunctionInfo>();
isThumb2 = AFI->isThumbFunction();
Context = &funcInfo.Fn->getContext();
@@ -1893,7 +1894,7 @@ CCAssignFn *ARMFastISel::CCAssignFnForCall(CallingConv::ID CC,
report_fatal_error("Unsupported calling convention");
case CallingConv::Fast:
if (Subtarget->hasVFP2Base() && !isVarArg) {
- if (!Subtarget->isAAPCS_ABI())
+ if (!TM.isAAPCS_ABI())
return (Return ? RetFastCC_ARM_APCS : FastCC_ARM_APCS);
// For AAPCS ABI targets, just use VFP variant of the calling convention.
return (Return ? RetCC_ARM_AAPCS_VFP : CC_ARM_AAPCS_VFP);
@@ -1902,7 +1903,7 @@ CCAssignFn *ARMFastISel::CCAssignFnForCall(CallingConv::ID CC,
case CallingConv::C:
case CallingConv::CXX_FAST_TLS:
// Use target triple & subtarget features to do actual dispatch.
- if (Subtarget->isAAPCS_ABI()) {
+ if (TM.isAAPCS_ABI()) {
if (Subtarget->hasFPRegs() &&
TM.Options.FloatABIType == FloatABI::Hard && !isVarArg)
return (Return ? RetCC_ARM_AAPCS_VFP: CC_ARM_AAPCS_VFP);
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 05d8a1190ada8..6e653687dbcb3 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -499,9 +499,16 @@ void ARMTargetLowering::addMVEVectorTypes(bool HasMVEFP) {
setOperationAction(ISD::TRUNCATE, MVT::v16i16, Custom);
}
-ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
+const ARMBaseTargetMachine &ARMTargetLowering::getTM() const {
+ return static_cast<const ARMBaseTargetMachine &>(getTargetMachine());
+}
+
+ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,
const ARMSubtarget &STI)
- : TargetLowering(TM), Subtarget(&STI) {
+ : TargetLowering(TM_), Subtarget(&STI) {
+
+ const auto &TM = static_cast<const ARMBaseTargetMachine &>(TM_);
+
RegInfo = Subtarget->getRegisterInfo();
Itins = Subtarget->getInstrItineraryData();
@@ -591,7 +598,7 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
}
// RTLIB
- if (Subtarget->isAAPCS_ABI() &&
+ if (TM.isAAPCS_ABI() &&
(Subtarget->isTargetAEABI() || Subtarget->isTargetGNUAEABI() ||
Subtarget->isTargetMuslAEABI() || Subtarget->isTargetAndroid())) {
// clang-format off
@@ -716,7 +723,7 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
// non-watchos platforms, but are needed for some targets which use a
// hard-float calling convention by default.
if (!Subtarget->isTargetWatchABI()) {
- if (Subtarget->isAAPCS_ABI()) {
+ if (TM.isAAPCS_ABI()) {
setLibcallCallingConv(RTLIB::FPROUND_F32_F16, CallingConv::ARM_AAPCS);
setLibcallCallingConv(RTLIB::FPROUND_F64_F16, CallingConv::ARM_AAPCS);
setLibcallCallingConv(RTLIB::FPEXT_F16_F32, CallingConv::ARM_AAPCS);
@@ -2070,7 +2077,7 @@ ARMTargetLowering::getEffectiveCallingConv(CallingConv::ID CC,
return isVarArg ? CallingConv::ARM_AAPCS : CallingConv::ARM_AAPCS_VFP;
case CallingConv::C:
case CallingConv::Tail:
- if (!Subtarget->isAAPCS_ABI())
+ if (!getTM().isAAPCS_ABI())
return CallingConv::ARM_APCS;
else if (Subtarget->hasFPRegs() && !Subtarget->isThumb1Only() &&
getTargetMachine().Options.FloatABIType == FloatABI::Hard &&
@@ -2080,12 +2087,12 @@ ARMTargetLowering::getEffectiveCallingConv(CallingConv::ID CC,
return CallingConv::ARM_AAPCS;
case CallingConv::Fast:
case CallingConv::CXX_FAST_TLS:
- if (!Subtarget->isAAPCS_ABI()) {
+ if (!getTM().isAAPCS_ABI()) {
if (Subtarget->hasVFP2Base() && !Subtarget->isThumb1Only() && !isVarArg)
return CallingConv::Fast;
return CallingConv::ARM_APCS;
- } else if (Subtarget->hasVFP2Base() &&
- !Subtarget->isThumb1Only() && !isVarArg)
+ } else if (Subtarget->hasVFP2Base() && !Subtarget->isThumb1Only() &&
+ !isVarArg)
return CallingConv::ARM_AAPCS_VFP;
else
return CallingConv::ARM_AAPCS;
@@ -3273,7 +3280,7 @@ ARMTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
SDValue Arg = OutVals[realRVLocIdx];
bool ReturnF16 = false;
- if (Subtarget->hasFullFP16() && Subtarget->isTargetHardFloat()) {
+ if (Subtarget->hasFullFP16() && getTM().isTargetHardFloat()) {
// Half-precision return values can be returned like this:
//
// t11 f16 = fadd ...
@@ -9937,7 +9944,7 @@ SDValue ARMTargetLowering::LowerFSINCOS(SDValue Op, SelectionDAG &DAG) const {
auto &DL = DAG.getDataLayout();
ArgListTy Args;
- bool ShouldUseSRet = Subtarget->isAPCS_ABI();
+ bool ShouldUseSRet = getTM().isAPCS_ABI();
SDValue SRet;
if (ShouldUseSRet) {
// Create stack object for sret.
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index e48967bd7f262..b4336a681fefb 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -34,6 +34,7 @@
namespace llvm {
+class ARMBaseTargetMachine;
class ARMSubtarget;
class DataLayout;
class FastISel;
@@ -414,6 +415,8 @@ class VectorType;
explicit ARMTargetLowering(const TargetMachine &TM,
const ARMSubtarget &STI);
+ const ARMBaseTargetMachine &getTM() const;
+
unsigned getJumpTableEncoding() const override;
bool useSoftFloat() const override;
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp
index 91d385a0b5950..abca4bb947bc4 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -201,9 +201,9 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
if (isTargetWindows())
NoARM = true;
- if (isAAPCS_ABI())
+ if (TM.isAAPCS_ABI())
stackAlignment = Align(8);
- if (isTargetNaCl() || isAAPCS16_ABI())
+ if (isTargetNaCl() || TM.isAAPCS16_ABI())
stackAlignment = Align(16);
// FIXME: Completely disable sibcall for Thumb1 since ThumbRegisterInfo::
@@ -320,22 +320,6 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
}
}
-bool ARMSubtarget::isTargetHardFloat() const { return TM.isTargetHardFloat(); }
-
-bool ARMSubtarget::isAPCS_ABI() const {
- assert(TM.TargetABI != ARMBaseTargetMachine::ARM_ABI_UNKNOWN);
- return TM.TargetABI == ARMBaseTargetMachine::ARM_ABI_APCS;
-}
-bool ARMSubtarget::isAAPCS_ABI() const {
- assert(TM.TargetABI != ARMBaseTargetMachine::ARM_ABI_UNKNOWN);
- return TM.TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS ||
- TM.TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16;
-}
-bool ARMSubtarget::isAAPCS16_ABI() const {
- assert(TM.TargetABI != ARMBaseTargetMachine::ARM_ABI_UNKNOWN);
- return TM.TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16;
-}
-
bool ARMSubtarget::isROPI() const {
return TM.getRelocationModel() == Reloc::ROPI ||
TM.getRelocationModel() == Reloc::ROPI_RWPI;
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h
index 890a22f574a6b..7893796e313b7 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.h
+++ b/llvm/lib/Target/ARM/ARMSubtarget.h
@@ -360,8 +360,6 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
return TargetTriple.isTargetEHABICompatible();
}
- bool isTargetHardFloat() const;
-
bool isReadTPSoft() const {
return !(isReadTPTPIDRURW() || isReadTPTPIDRURO() || isReadTPTPIDRPRW());
}
@@ -370,10 +368,6 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
bool isXRaySupported() const override;
- bool isAPCS_ABI() const;
- bool isAAPCS_ABI() const;
- bool isAAPCS16_ABI() const;
-
bool isROPI() const;
bool isRWPI() const;
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index fee77a44e5e80..0d947d924eb69 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -271,6 +271,22 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT,
ARMBaseTargetMachine::~ARMBaseTargetMachine() = default;
+bool ARMBaseTargetMachine::isAPCS_ABI() const {
+ assert(TargetABI != ARMBaseTargetMachine::ARM_ABI_UNKNOWN);
+ return TargetABI == ARMBaseTargetMachine::ARM_ABI_APCS;
+}
+
+bool ARMBaseTargetMachine::isAAPCS_ABI() const {
+ assert(TargetABI != ARMBaseTargetMachine::ARM_ABI_UNKNOWN);
+ return TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS ||
+ TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16;
+}
+
+bool ARMBaseTargetMachine::isAAPCS16_ABI() const {
+ assert(TargetABI != ARMBaseTargetMachine::ARM_ABI_UNKNOWN);
+ return TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16;
+}
+
MachineFunctionInfo *ARMBaseTargetMachine::createMachineFunctionInfo(
BumpPtrAllocator &Allocator, const Function &F,
const TargetSubtargetInfo *STI) const {
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.h b/llvm/lib/Target/ARM/ARMTargetMachine.h
index 99fd817c81f89..513fe713c0bc1 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.h
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.h
@@ -66,6 +66,10 @@ class ARMBaseTargetMachine : public CodeGenTargetMachineImpl {
return TLOF.get();
}
+ bool isAPCS_ABI() const;
+ bool isAAPCS_ABI() const;
+ bool isAAPCS16_ABI() const;
+
bool isTargetHardFloat() const {
return TargetTriple.getEnvironment() == Triple::GNUEABIHF ||
TargetTriple.getEnvironment() == Triple::GNUEABIHFT64 ||
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June 19, 2025 00:36
These are module level concepts, and attaching them to the function level subtarget is confusing. Similarly these other helpers that only operate on the triple should also be removed from the subtarget.
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These are module level concepts, and attaching them to the
function level subtarget is confusing. Similarly these other
helpers that only operate on the triple should also be removed
from the subtarget.