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[CIR] Add bitfield offset calculation for big-endian targets #145067

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Merged
merged 1 commit into from
Jun 23, 2025

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Andres-Salamanca
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This PR updates the bitfield offset calculation to correctly handle big-endian architectures.

@llvmbot llvmbot added clang Clang issues not falling into any other category ClangIR Anything related to the ClangIR project labels Jun 20, 2025
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llvmbot commented Jun 20, 2025

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Author: None (Andres-Salamanca)

Changes

This PR updates the bitfield offset calculation to correctly handle big-endian architectures.


Full diff: https://github.com/llvm/llvm-project/pull/145067.diff

3 Files Affected:

  • (modified) clang/include/clang/CIR/MissingFeatures.h (-1)
  • (modified) clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp (+2-1)
  • (added) clang/test/CIR/CodeGen/bitfields_be.c (+17)
diff --git a/clang/include/clang/CIR/MissingFeatures.h b/clang/include/clang/CIR/MissingFeatures.h
index e0b2959f374f8..d8e45d02cd2a0 100644
--- a/clang/include/clang/CIR/MissingFeatures.h
+++ b/clang/include/clang/CIR/MissingFeatures.h
@@ -150,7 +150,6 @@ struct MissingFeatures {
   static bool cxxabiAppleARM64CXXABI() { return false; }
   static bool cxxabiStructorImplicitParam() { return false; }
   static bool isDiscreteBitFieldABI() { return false; }
-  static bool isBigEndian() { return false; }
 
   // Address class
   static bool addressOffset() { return false; }
diff --git a/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp b/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
index 8dbf1b36a93b2..d2fb4b711b0c2 100644
--- a/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
@@ -228,7 +228,8 @@ void CIRRecordLowering::setBitFieldInfo(const FieldDecl *fd,
   // out as packed bits within an integer-sized unit, we can imagine the bits
   // counting from the most-significant-bit instead of the
   // least-significant-bit.
-  assert(!cir::MissingFeatures::isBigEndian());
+  if (dataLayout.isBigEndian())
+    info.offset = info.storageSize - (info.offset + info.size);
 
   info.volatileStorageSize = 0;
   info.volatileOffset = 0;
diff --git a/clang/test/CIR/CodeGen/bitfields_be.c b/clang/test/CIR/CodeGen/bitfields_be.c
new file mode 100644
index 0000000000000..149e9c9ac33ff
--- /dev/null
+++ b/clang/test/CIR/CodeGen/bitfields_be.c
@@ -0,0 +1,17 @@
+// RUN: %clang_cc1  -triple aarch64_be-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir
+// RUN: FileCheck --input-file=%t.cir %s --check-prefix=CIR
+// RUN: %clang_cc1  -triple aarch64_be-unknown-linux-gnu -fclangir -emit-llvm %s -o %t-cir.ll
+// RUN: FileCheck --input-file=%t-cir.ll %s --check-prefix=LLVM
+// RUN: %clang_cc1  -triple aarch64_be-unknown-linux-gnu -emit-llvm %s -o %t.ll
+// RUN: FileCheck --input-file=%t.ll %s --check-prefix=OGCG
+
+typedef struct {
+    int a : 4;
+    int b : 11;
+    int c : 17;
+} S;
+S s;
+
+// CIR:  !rec_S = !cir.record<struct "S" {!u32i}>
+// LLVM: %struct.S = type { i32 }
+// OGCG: %struct.S = type { i32 }

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Nice to see this done Incrementally, LGTM.

@Andres-Salamanca Andres-Salamanca merged commit f4d31cd into llvm:main Jun 23, 2025
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@Andres-Salamanca Are you expecting the test to be failing?

Here is what I am seeing:

error: ClangIR code gen Not Yet Implemented: NYI AAPCS bit-fields
error: ClangIR code gen Not Yet Implemented: NYI AAPCS bit-fields
error: ClangIR code gen Not Yet Implemented: NYI AAPCS bit-fields
3 errors generated.

--

********************
********************
Failed Tests (1):
  Clang :: CIR/CodeGen/bitfields_be.c

@Andres-Salamanca
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@Andres-Salamanca Are you expecting the test to be failing?

Here is what I am seeing:

error: ClangIR code gen Not Yet Implemented: NYI AAPCS bit-fields
error: ClangIR code gen Not Yet Implemented: NYI AAPCS bit-fields
error: ClangIR code gen Not Yet Implemented: NYI AAPCS bit-fields
3 errors generated.

--

********************
********************
Failed Tests (1):
  Clang :: CIR/CodeGen/bitfields_be.c

Hey! Sorry about the failing test I just pushed 2767ff4 without rebasing first, so it didn't pick up the recent changes. That's why we're getting the NYI AAPCS bit-fields error in bitfields_be.c.

I'll clean this up now going to remove the error emission and just leave a NYI marker so it behaves as a missing feature, not a hard failure.

andykaylor pushed a commit that referenced this pull request Jun 24, 2025
This PR addresses the error mentioned in
#145067 (comment),
which occurs on ARM when handling an unsupported bit-field case. The
patch removes the error and replaces it with an assert, marking the
missing feature.
llvm-sync bot pushed a commit to arm/arm-toolchain that referenced this pull request Jun 24, 2025
…e (#145560)

This PR addresses the error mentioned in
llvm/llvm-project#145067 (comment),
which occurs on ARM when handling an unsupported bit-field case. The
patch removes the error and replaces it with an assert, marking the
missing feature.
DrSergei pushed a commit to DrSergei/llvm-project that referenced this pull request Jun 24, 2025
)

This PR addresses the error mentioned in
llvm#145067 (comment),
which occurs on ARM when handling an unsupported bit-field case. The
patch removes the error and replaces it with an assert, marking the
missing feature.
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4 participants