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[AMDGPU] Add s_wait_xcnt gfx1250 instruction #145086

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Merged
merged 1 commit into from
Jun 20, 2025
Merged

[AMDGPU] Add s_wait_xcnt gfx1250 instruction #145086

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10 changes: 10 additions & 0 deletions llvm/lib/Target/AMDGPU/AMDGPU.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1112,6 +1112,12 @@ def FeaturePointSampleAccel : SubtargetFeature<"point-sample-accel",
"Has point sample acceleration feature"
>;

def FeatureWaitXcnt : SubtargetFeature<"wait-xcnt",
"HasWaitXcnt",
"true",
"Has s_wait_xcnt instruction"
>;

//===------------------------------------------------------------===//
// Subtarget Features (options and debugging)
//===------------------------------------------------------------===//
Expand Down Expand Up @@ -1927,6 +1933,7 @@ def FeatureISAVersion12_50 : FeatureSet<
FeatureAshrPkInsts,
FeatureSupportsSRAMECC,
FeatureMaxHardClauseLength63,
FeatureWaitXcnt,
FeatureAtomicFMinFMaxF64GlobalInsts,
FeatureAtomicFMinFMaxF64FlatInsts,
FeatureFlatBufferGlobalAtomicFaddF64Inst,
Expand Down Expand Up @@ -2591,6 +2598,9 @@ def HasPrngInst : Predicate<"Subtarget->hasPrngInst()">,
def HasBVHDualAndBVH8Insts : Predicate<"Subtarget->hasBVHDualAndBVH8Insts()">,
AssemblerPredicate<(all_of FeatureBVHDualAndBVH8Insts)>;

def HasWaitXcnt : Predicate<"Subtarget->hasWaitXcnt()">,
AssemblerPredicate<(all_of FeatureWaitXcnt)>;

def HasFP8ConversionScaleInsts : Predicate<"Subtarget->hasFP8ConversionScaleInsts()">,
AssemblerPredicate<(all_of FeatureFP8ConversionScaleInsts)>;

Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Target/AMDGPU/GCNSubtarget.h
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Expand Up @@ -202,6 +202,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,

bool HasNoSdstCMPX = false;
bool HasVscnt = false;
bool HasWaitXcnt = false;
bool HasGetWaveIdInst = false;
bool HasSMemTimeInst = false;
bool HasShaderCyclesRegister = false;
Expand Down Expand Up @@ -1368,6 +1369,10 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
return HasMinimum3Maximum3PKF16;
}

/// \returns true if the target has s_wait_xcnt insertion. Supported for
/// GFX1250.
bool hasWaitXCnt() const { return HasWaitXcnt; }

bool hasPointSampleAccel() const { return HasPointSampleAccel; }

/// \returns The maximum number of instructions that can be enclosed in an
Expand Down
10 changes: 10 additions & 0 deletions llvm/lib/Target/AMDGPU/SOPInstructions.td
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Expand Up @@ -1751,6 +1751,11 @@ let OtherPredicates = [HasExportInsts] in
[(int_amdgcn_s_wait_kmcnt timm:$simm16)]>;
} // End SubtargetPredicate = isGFX12Plus, hasSideEffects = 1

let SubtargetPredicate = HasWaitXcnt, hasSideEffects = 1 in {
def S_WAIT_XCNT :
SOPP_Pseudo<"s_wait_xcnt", (ins s16imm:$simm16), "$simm16">;
} // End SubtargetPredicate = hasWaitXcnt, hasSideEffects = 1

//===----------------------------------------------------------------------===//
// SOP1 Patterns
//===----------------------------------------------------------------------===//
Expand Down Expand Up @@ -2560,6 +2565,11 @@ defm S_WAIT_KMCNT : SOPP_Real_32_gfx12<0x047>;
defm S_WAIT_LOADCNT_DSCNT : SOPP_Real_32_gfx12<0x048>;
defm S_WAIT_STORECNT_DSCNT : SOPP_Real_32_gfx12<0x049>;

//===----------------------------------------------------------------------===//
// SOPP - GFX1250 only.
//===----------------------------------------------------------------------===//
defm S_WAIT_XCNT : SOPP_Real_32_gfx12<0x045>;

//===----------------------------------------------------------------------===//
// SOPP - GFX11, GFX12.
//===----------------------------------------------------------------------===//
Expand Down
14 changes: 14 additions & 0 deletions llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
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@@ -0,0 +1,14 @@
// RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1250 %s | FileCheck --check-prefix=GFX1250 %s
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX12-ERR --implicit-check-not=error: -strict-whitespace %s

s_wait_xcnt 0x0
// GFX1250: [0x00,0x00,0xc5,0xbf]
// GFX12-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU

s_wait_xcnt 0x7
// GFX1250: [0x07,0x00,0xc5,0xbf]
// GFX12-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU

s_wait_xcnt 0xf
// GFX1250: [0x0f,0x00,0xc5,0xbf]
// GFX12-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
10 changes: 10 additions & 0 deletions llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sopp.txt
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@@ -0,0 +1,10 @@
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1250 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX1250 %s

# GFX1250: s_wait_xcnt 0x0 ; encoding: [0x00,0x00,0xc5,0xbf]
0x00,0x00,0xc5,0xbf

# GFX1250: s_wait_xcnt 0x7 ; encoding: [0x07,0x00,0xc5,0xbf]
0x07,0x00,0xc5,0xbf

# GFX1250: s_wait_xcnt 0xf ; encoding: [0x0f,0x00,0xc5,0xbf]
0x0f,0x00,0xc5,0xbf
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