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Revert "[lldb][RISCV] fix LR/SC atomic sequence handling in lldb-server" #145597

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merged 1 commit into from
Jun 24, 2025

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Reverts #127505 because riscv/step/TestSoftwareStep.py is failing on the bots.

@JDevlieghere JDevlieghere requested a review from dlav-sc June 24, 2025 21:04
@llvmbot llvmbot added the lldb label Jun 24, 2025
@JDevlieghere JDevlieghere merged commit aa3c5d0 into main Jun 24, 2025
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@JDevlieghere JDevlieghere deleted the revert-127505-dlav-sc/lldb-fix-lrsc-inst branch June 24, 2025 21:05
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llvmbot commented Jun 24, 2025

@llvm/pr-subscribers-lldb

Author: Jonas Devlieghere (JDevlieghere)

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Reverts llvm/llvm-project#127505 because riscv/step/TestSoftwareStep.py is failing on the bots.


Patch is 47.24 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/145597.diff

19 Files Affected:

  • (modified) lldb/include/lldb/Core/EmulateInstruction.h (-61)
  • (modified) lldb/source/Core/EmulateInstruction.cpp (-92)
  • (modified) lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (-13)
  • (modified) lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.h (-18)
  • (modified) lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp (+49-73)
  • (modified) lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h (+2)
  • (modified) lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp (+18-128)
  • (modified) lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h (+3-34)
  • (modified) lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp (+5-7)
  • (modified) lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp (+5-7)
  • (modified) lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp (+87-21)
  • (modified) lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.h (+1-2)
  • (removed) lldb/test/API/riscv/step/Makefile (-3)
  • (removed) lldb/test/API/riscv/step/TestSoftwareStep.py (-79)
  • (removed) lldb/test/API/riscv/step/branch.c (-22)
  • (removed) lldb/test/API/riscv/step/incomplete_sequence_without_lr.c (-22)
  • (removed) lldb/test/API/riscv/step/incomplete_sequence_without_sc.c (-21)
  • (removed) lldb/test/API/riscv/step/main.c (-22)
  • (modified) lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp (+18-18)
diff --git a/lldb/include/lldb/Core/EmulateInstruction.h b/lldb/include/lldb/Core/EmulateInstruction.h
index a9fd4543cbbcb..b459476883fc5 100644
--- a/lldb/include/lldb/Core/EmulateInstruction.h
+++ b/lldb/include/lldb/Core/EmulateInstruction.h
@@ -22,8 +22,6 @@
 #include "lldb/lldb-private-types.h"
 #include "lldb/lldb-types.h"
 
-#include "llvm/Support/Error.h"
-
 #include <cstddef>
 #include <cstdint>
 
@@ -34,38 +32,6 @@ class RegisterValue;
 class Stream;
 class Target;
 class UnwindPlan;
-class EmulateInstruction;
-
-using BreakpointLocations = std::vector<lldb::addr_t>;
-
-class SingleStepBreakpointLocationsPredictor {
-public:
-  SingleStepBreakpointLocationsPredictor(
-      std::unique_ptr<EmulateInstruction> emulator_up)
-      : m_emulator_up{std::move(emulator_up)} {}
-
-  virtual BreakpointLocations GetBreakpointLocations(Status &status);
-
-  virtual llvm::Expected<unsigned>
-  GetBreakpointSize([[maybe_unused]] lldb::addr_t bp_addr) {
-    return 4;
-  }
-
-  virtual ~SingleStepBreakpointLocationsPredictor() = default;
-
-protected:
-  // This function retrieves the address of the next instruction as it appears
-  // in the binary file. Essentially, it reads the value of the PC register,
-  // determines the size of the current instruction (where the PC is pointing),
-  // and returns the sum of these two values.
-  lldb::addr_t GetNextInstructionAddress(Status &error);
-
-  lldb::addr_t GetBreakpointLocationAddress(lldb::addr_t entry_pc,
-                                            Status &error);
-
-  std::unique_ptr<EmulateInstruction> m_emulator_up;
-  bool m_emulation_result = false;
-};
 
 /// \class EmulateInstruction EmulateInstruction.h
 /// "lldb/Core/EmulateInstruction.h"
@@ -531,19 +497,7 @@ class EmulateInstruction : public PluginInterface {
   static uint32_t GetInternalRegisterNumber(RegisterContext *reg_ctx,
                                             const RegisterInfo &reg_info);
 
-  static std::unique_ptr<SingleStepBreakpointLocationsPredictor>
-  CreateBreakpointLocationPredictor(
-      std::unique_ptr<EmulateInstruction> emulator_up);
-
-  // Helper functions
-  std::optional<lldb::addr_t> ReadPC();
-  bool WritePC(lldb::addr_t addr);
-
 protected:
-  using BreakpointLocationsPredictorCreator =
-      std::function<std::unique_ptr<SingleStepBreakpointLocationsPredictor>(
-          std::unique_ptr<EmulateInstruction>)>;
-
   ArchSpec m_arch;
   void *m_baton = nullptr;
   ReadMemoryCallback m_read_mem_callback = &ReadMemoryDefault;
@@ -554,21 +508,6 @@ class EmulateInstruction : public PluginInterface {
   Opcode m_opcode;
 
 private:
-  virtual BreakpointLocationsPredictorCreator
-  GetSingleStepBreakpointLocationsPredictorCreator() {
-    if (!m_arch.IsMIPS() && !m_arch.GetTriple().isPPC64() &&
-        !m_arch.GetTriple().isLoongArch()) {
-      // Unsupported architecture
-      return [](std::unique_ptr<EmulateInstruction> emulator_up) {
-        return nullptr;
-      };
-    }
-    return [](std::unique_ptr<EmulateInstruction> emulator_up) {
-      return std::make_unique<SingleStepBreakpointLocationsPredictor>(
-          std::move(emulator_up));
-    };
-  }
-
   // For EmulateInstruction only
   EmulateInstruction(const EmulateInstruction &) = delete;
   const EmulateInstruction &operator=(const EmulateInstruction &) = delete;
diff --git a/lldb/source/Core/EmulateInstruction.cpp b/lldb/source/Core/EmulateInstruction.cpp
index 634ce1075d54b..d240b4d3b3310 100644
--- a/lldb/source/Core/EmulateInstruction.cpp
+++ b/lldb/source/Core/EmulateInstruction.cpp
@@ -588,99 +588,7 @@ EmulateInstruction::GetInternalRegisterNumber(RegisterContext *reg_ctx,
   return LLDB_INVALID_REGNUM;
 }
 
-std::unique_ptr<SingleStepBreakpointLocationsPredictor>
-EmulateInstruction::CreateBreakpointLocationPredictor(
-    std::unique_ptr<EmulateInstruction> emulator_up) {
-  auto creator =
-      emulator_up->GetSingleStepBreakpointLocationsPredictorCreator();
-  return creator(std::move(emulator_up));
-}
-
-std::optional<lldb::addr_t> EmulateInstruction::ReadPC() {
-  bool success = false;
-  auto addr = ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC,
-                                   LLDB_INVALID_ADDRESS, &success);
-  return success ? std::optional<addr_t>(addr) : std::nullopt;
-}
-
-bool EmulateInstruction::WritePC(lldb::addr_t addr) {
-  EmulateInstruction::Context ctx;
-  ctx.type = eContextAdvancePC;
-  ctx.SetNoArgs();
-  return WriteRegisterUnsigned(ctx, eRegisterKindGeneric,
-                               LLDB_REGNUM_GENERIC_PC, addr);
-}
-
 bool EmulateInstruction::CreateFunctionEntryUnwind(UnwindPlan &unwind_plan) {
   unwind_plan.Clear();
   return false;
 }
-
-BreakpointLocations
-SingleStepBreakpointLocationsPredictor::GetBreakpointLocations(Status &status) {
-  if (!m_emulator_up->ReadInstruction()) {
-    // try to get at least the size of next instruction to set breakpoint.
-    lldb::addr_t next_pc = GetNextInstructionAddress(status);
-    return BreakpointLocations{next_pc};
-  }
-
-  auto entry_pc = m_emulator_up->ReadPC();
-  if (!entry_pc) {
-    status = Status("Can't read PC");
-    return {};
-  }
-
-  m_emulation_result = m_emulator_up->EvaluateInstruction(
-      eEmulateInstructionOptionAutoAdvancePC);
-
-  lldb::addr_t next_pc = GetBreakpointLocationAddress(*entry_pc, status);
-  return BreakpointLocations{next_pc};
-}
-
-lldb::addr_t SingleStepBreakpointLocationsPredictor::GetNextInstructionAddress(
-    Status &error) {
-  auto instr_size = m_emulator_up->GetLastInstrSize();
-  if (!instr_size) {
-    error = Status("Read instruction failed!");
-    return LLDB_INVALID_ADDRESS;
-  }
-
-  auto pc = m_emulator_up->ReadPC();
-  if (!pc) {
-    error = Status("Can't read PC");
-    return LLDB_INVALID_ADDRESS;
-  }
-
-  lldb::addr_t next_pc = *pc + *instr_size;
-  return next_pc;
-}
-
-lldb::addr_t
-SingleStepBreakpointLocationsPredictor::GetBreakpointLocationAddress(
-    lldb::addr_t entry_pc, Status &error) {
-  auto addr = m_emulator_up->ReadPC();
-  if (!addr) {
-    error = Status("Can't read PC");
-    return LLDB_INVALID_ADDRESS;
-  }
-  lldb::addr_t pc = *addr;
-
-  if (m_emulation_result) {
-    assert(entry_pc != pc && "Emulation was successfull but PC wasn't updated");
-    return pc;
-  }
-
-  if (entry_pc == pc) {
-    // Emulate instruction failed and it hasn't changed PC. Advance PC with
-    // the size of the current opcode because the emulation of all
-    // PC modifying instruction should be successful. The failure most
-    // likely caused by an unsupported instruction which does not modify PC.
-    return pc + m_emulator_up->GetOpcode().GetByteSize();
-  }
-
-  // The instruction emulation failed after it modified the PC. It is an
-  // unknown error where we can't continue because the next instruction is
-  // modifying the PC but we don't  know how.
-  error = Status("Instruction emulation failed unexpectedly.");
-  return LLDB_INVALID_ADDRESS;
-}
diff --git a/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp b/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
index 89da4d200699f..32975d88af46e 100644
--- a/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
+++ b/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
@@ -14471,16 +14471,3 @@ bool EmulateInstructionARM::CreateFunctionEntryUnwind(UnwindPlan &unwind_plan) {
   unwind_plan.SetReturnAddressRegister(dwarf_lr);
   return true;
 }
-
-llvm::Expected<unsigned>
-ARMSingleStepBreakpointLocationsPredictor::GetBreakpointSize(
-    lldb::addr_t bp_addr) {
-  auto flags = m_emulator_up->ReadRegisterUnsigned(
-      eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_ADDRESS,
-      nullptr);
-  if (flags == LLDB_INVALID_ADDRESS)
-    return llvm::createStringError(llvm::inconvertibleErrorCode(),
-                                   "Reading flags failed!");
-
-  return (flags & 0x20) ? /* Thumb mode */ 2 : /* Arm mode */ 4;
-}
diff --git a/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.h b/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.h
index 7931e0e648fb0..9eca0288607c1 100644
--- a/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.h
+++ b/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.h
@@ -16,16 +16,6 @@
 
 namespace lldb_private {
 
-class ARMSingleStepBreakpointLocationsPredictor
-    : public SingleStepBreakpointLocationsPredictor {
-public:
-  ARMSingleStepBreakpointLocationsPredictor(
-      std::unique_ptr<EmulateInstruction> emulator_up)
-      : SingleStepBreakpointLocationsPredictor{std::move(emulator_up)} {}
-
-  llvm::Expected<unsigned> GetBreakpointSize(lldb::addr_t bp_addr) override;
-};
-
 // ITSession - Keep track of the IT Block progression.
 class ITSession {
 public:
@@ -780,14 +770,6 @@ class EmulateInstructionARM : public EmulateInstruction {
   // B6.2.13 SUBS PC, LR and related instructions
   bool EmulateSUBSPcLrEtc(const uint32_t opcode, const ARMEncoding encoding);
 
-  BreakpointLocationsPredictorCreator
-  GetSingleStepBreakpointLocationsPredictorCreator() override {
-    return [](std::unique_ptr<EmulateInstruction> emulator_up) {
-      return std::make_unique<ARMSingleStepBreakpointLocationsPredictor>(
-          std::move(emulator_up));
-    };
-  }
-
   uint32_t m_arm_isa;
   Mode m_opcode_mode;
   uint32_t m_opcode_cpsr;
diff --git a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
index db32bf8a4dd51..37f08592d62b9 100644
--- a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
+++ b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
@@ -86,6 +86,7 @@ bool EmulateInstructionLoongArch::EvaluateInstruction(uint32_t options) {
   uint32_t inst_size = m_opcode.GetByteSize();
   uint32_t inst = m_opcode.GetOpcode32();
   bool increase_pc = options & eEmulateInstructionOptionAutoAdvancePC;
+  bool success = false;
 
   Opcode *opcode_data = GetOpcodeForInstruction(inst);
   if (!opcode_data)
@@ -93,10 +94,9 @@ bool EmulateInstructionLoongArch::EvaluateInstruction(uint32_t options) {
 
   lldb::addr_t old_pc = 0;
   if (increase_pc) {
-    auto addr = ReadPC();
-    if (!addr)
+    old_pc = ReadPC(&success);
+    if (!success)
       return false;
-    old_pc = *addr;
   }
 
   // Call the Emulate... function.
@@ -104,10 +104,9 @@ bool EmulateInstructionLoongArch::EvaluateInstruction(uint32_t options) {
     return false;
 
   if (increase_pc) {
-    auto addr = ReadPC();
-    if (!addr)
+    lldb::addr_t new_pc = ReadPC(&success);
+    if (!success)
       return false;
-    lldb::addr_t new_pc = *addr;
 
     if (new_pc == old_pc && !WritePC(old_pc + inst_size))
       return false;
@@ -116,14 +115,13 @@ bool EmulateInstructionLoongArch::EvaluateInstruction(uint32_t options) {
 }
 
 bool EmulateInstructionLoongArch::ReadInstruction() {
-  auto addr = ReadPC();
-  if (!addr) {
+  bool success = false;
+  m_addr = ReadPC(&success);
+  if (!success) {
     m_addr = LLDB_INVALID_ADDRESS;
     return false;
   }
-  m_addr = *addr;
 
-  bool success = false;
   Context ctx;
   ctx.type = eContextReadOpcode;
   ctx.SetNoArgs();
@@ -133,6 +131,19 @@ bool EmulateInstructionLoongArch::ReadInstruction() {
   return true;
 }
 
+lldb::addr_t EmulateInstructionLoongArch::ReadPC(bool *success) {
+  return ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC,
+                              LLDB_INVALID_ADDRESS, success);
+}
+
+bool EmulateInstructionLoongArch::WritePC(lldb::addr_t pc) {
+  EmulateInstruction::Context ctx;
+  ctx.type = eContextAdvancePC;
+  ctx.SetNoArgs();
+  return WriteRegisterUnsigned(ctx, eRegisterKindGeneric,
+                               LLDB_REGNUM_GENERIC_PC, pc);
+}
+
 std::optional<RegisterInfo>
 EmulateInstructionLoongArch::GetRegisterInfo(lldb::RegisterKind reg_kind,
                                              uint32_t reg_index) {
@@ -262,12 +273,9 @@ bool EmulateInstructionLoongArch::EmulateNonJMP(uint32_t inst) { return false; }
 bool EmulateInstructionLoongArch::EmulateBEQZ64(uint32_t inst) {
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
-
-  auto addr = ReadPC();
-  if (!addr)
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
   uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
@@ -285,12 +293,9 @@ bool EmulateInstructionLoongArch::EmulateBEQZ64(uint32_t inst) {
 bool EmulateInstructionLoongArch::EmulateBNEZ64(uint32_t inst) {
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
-
-  auto addr = ReadPC();
-  if (!addr)
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
   uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
@@ -308,12 +313,9 @@ bool EmulateInstructionLoongArch::EmulateBNEZ64(uint32_t inst) {
 bool EmulateInstructionLoongArch::EmulateBCEQZ64(uint32_t inst) {
   bool success = false;
   uint32_t cj = Bits32(inst, 7, 5) + fpr_fcc0_loongarch;
-
-  auto addr = ReadPC();
-  if (!addr)
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
   uint8_t cj_val =
       (uint8_t)ReadRegisterUnsigned(eRegisterKindLLDB, cj, 0, &success);
@@ -333,12 +335,9 @@ bool EmulateInstructionLoongArch::EmulateBCEQZ64(uint32_t inst) {
 bool EmulateInstructionLoongArch::EmulateBCNEZ64(uint32_t inst) {
   bool success = false;
   uint32_t cj = Bits32(inst, 7, 5) + fpr_fcc0_loongarch;
-
-  auto addr = ReadPC();
-  if (!addr)
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
   uint8_t cj_val =
       (uint8_t)ReadRegisterUnsigned(eRegisterKindLLDB, cj, 0, &success);
@@ -359,12 +358,9 @@ bool EmulateInstructionLoongArch::EmulateJIRL64(uint32_t inst) {
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
   bool success = false;
-
-  auto addr = ReadPC();
-  if (!addr)
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   EmulateInstruction::Context ctx;
   if (!WriteRegisterUnsigned(ctx, eRegisterKindLLDB, rd, pc + 4))
     return false;
@@ -378,11 +374,10 @@ bool EmulateInstructionLoongArch::EmulateJIRL64(uint32_t inst) {
 // b offs26
 // PC = PC + SignExtend({offs26, 2' b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateB64(uint32_t inst) {
-  auto addr = ReadPC();
-  if (!addr)
+  bool success = false;
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   uint32_t offs26 = Bits32(inst, 25, 10) + (Bits32(inst, 9, 0) << 16);
   uint64_t next_pc = pc + llvm::SignExtend64<28>(offs26 << 2);
   return WritePC(next_pc);
@@ -392,11 +387,10 @@ bool EmulateInstructionLoongArch::EmulateB64(uint32_t inst) {
 // GR[1] = PC + 4
 // PC = PC + SignExtend({offs26, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBL64(uint32_t inst) {
-  auto addr = ReadPC();
-  if (!addr)
+  bool success = false;
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   EmulateInstruction::Context ctx;
   if (!WriteRegisterUnsigned(ctx, eRegisterKindLLDB, gpr_r1_loongarch, pc + 4))
     return false;
@@ -412,12 +406,9 @@ bool EmulateInstructionLoongArch::EmulateBEQ64(uint32_t inst) {
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-
-  auto addr = ReadPC();
-  if (!addr)
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
@@ -438,12 +429,9 @@ bool EmulateInstructionLoongArch::EmulateBNE64(uint32_t inst) {
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-
-  auto addr = ReadPC();
-  if (!addr)
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
@@ -464,12 +452,9 @@ bool EmulateInstructionLoongArch::EmulateBLT64(uint32_t inst) {
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-
-  auto addr = ReadPC();
-  if (!addr)
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   int64_t rj_val =
       (int64_t)ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
@@ -492,12 +477,9 @@ bool EmulateInstructionLoongArch::EmulateBGE64(uint32_t inst) {
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-
-  auto addr = ReadPC();
-  if (!addr)
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   int64_t rj_val =
       (int64_t)ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
@@ -520,12 +502,9 @@ bool EmulateInstructionLoongArch::EmulateBLTU64(uint32_t inst) {
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-
-  auto addr = ReadPC();
-  if (!addr)
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
@@ -546,12 +525,9 @@ bool EmulateInstructionLoongArch::EmulateBGEU64(uint32_t inst) {
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-
-  auto addr = ReadPC();
-  if (!addr)
+  uint64_t pc = ReadPC(&success);
+  if (!success)
     return false;
-  uint64_t pc = *addr;
-
   uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
diff --git a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
index 2a8acba42f49e..47fe454fcd88c 100644
--- a/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
+++ b/lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
@@ -57,6 +57,8 @@ class EmulateInstructionLoongArch : public EmulateInstruction {
 
   std::optional<RegisterInfo> GetRegisterInfo(lldb::RegisterKind reg_kind,
                                               uint32_t reg_num) override;
+  lldb::addr_t ReadPC(bool *success);
+  bool WritePC(lldb::addr_t pc);
   bool IsLoongArch64() { return m_arch_subtype == llvm::Triple::loongarch64; }
   bool TestExecute(uint32_t inst);
 
diff --git a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
index c22d5bbdb6924..badc7ba36f011 100644
--- a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
+++ b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
@@ -650,10 +650,9 @@ std::optional<DecodeResult> EmulateInstructionRISCV::Decode(uint32_t inst) {
   for (const InstrPattern &pat : PATTERNS) {
     if ((inst & pat.type_mask) == pat.eigen &&
         (inst_type & pat.inst_type) != 0) {
-      LLDB_LOGF(log,
-                "EmulateInstructionRISCV::%s: inst(%x at %" PRIx64
-                ") was decoded to %s",
-                __FUNCTION__, inst, m_addr, pat.name);
+      LLDB_LOGF(
+          log, "EmulateInstructionRISCV::%s: inst(%x at %" PRIx64 ") was decoded to %s",
+          __FUNCTION__, inst, m_addr, pat.name);
       auto decoded = is_16b ? pat.decode(try_rvc) : pat.decode(inst);
       return DecodeResult{decoded, inst, is_16b, pat};
     }
@@ -1650,6 +1649,21 @@ bool EmulateInstructionRISCV::ReadInstruction() {
   return true;
 }
 
+std::optional<addr_t> EmulateInstructionRISCV::ReadPC() {
+  bool success = false;
+  auto addr = ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC,
+                                   LLDB_INVALID_ADDRESS, &success);
+  return success ? std::optional<addr_t>(addr) : std::nullopt;
+}
...
[truncated]

anthonyhatran pushed a commit to anthonyhatran/llvm-project that referenced this pull request Jun 26, 2025
…er" (llvm#145597)

Reverts llvm#127505 because
`riscv/step/TestSoftwareStep.py` is failing on the bots.
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