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Remove remoteast from get dynamic type and address class #340

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augusto2112
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git apple-llvm automerger added 30 commits July 24, 2021 14:00
JDevlieghere and others added 26 commits August 17, 2021 09:45
Unfortunatley the IR Verifier doesn't reject debug intrinsics that
have nullptr as arguments, so coro::salvageDebugInfo for now also
needs to deal with them.

rdar://81979541
(cherry picked from commit 8ae5e0b)
Always codesign binaries on macOS. Apple Silicon has stricter
codesigning requirements, for example requiring macCatalyst binaries to
be signed. Ad-hoc sign everything like we do for other Darwin platforms.

(cherry picked from commit fe23f0c)
Update ARMGetSupportedArchitectureAtIndex to consider remote macOS
debugging. Currently, it defaults to an iOS triple when IsHost() returns
false. This fixes TestPlatformSDK.py on Apple Silicon.

Differential revision: https://reviews.llvm.org/D107179

(cherry picked from commit 7ad854c)
The tests strips the binary which invalidates the code signature. Skip
code signing for this test.

(cherry picked from commit 825a08f)
BOOL is bool instead of signed char on ARM. See
https://reviews.llvm.org/D93421#inline-874116 for details.

(cherry picked from commit f899445)
(cherry picked from commit 3e27b4e)
…0210726

[20210726] rdar://81632946 [libclang][deps] Accept only driver invocations, don't modify them
The registers involved might not be identical, but can still overlap (e.g.
"str w0, [x0, llvm#4]!").

(cherry picked from commit 3d41ef6)
…4ed43be91b44b583c7158

AArch64: don't form indexed paired ops if base reg overlaps operands.
…1f670c9a66497a8c1094ec

Revert "Reland "[Clang] Propagate guaranteed alignment for malloc and…
Add test update for a11d9a1 which disables fallbacks.
When reconstructing a private Objective-C type, walk up the
type hierarchy until a type importable from Swift is found or
until we run out of types.
[lldb] Find public Objective-C class when reconstructing type
…-type-hierarchy

[lldb] clang-format comment in ReconstructType
…shifted

Add a comment when there is a shifted value,
    add x9, x0, llvm#291, lsl llvm#12 ; =1191936
but not when the immediate value is unshifted,
    subs x9, x0, llvm#256 ; =256
when the comment adds nothing additional to the reader.

Differential Revision: https://reviews.llvm.org/D107196

(cherry picked from commit 0d8cd4e)
Causes a fallback because of lack of regclasses on vregs, unless its without
asserts, where we end up crashing later in codegen.

(cherry picked from commit a11d9a1)
[AArch64][GlobalISel] Fix constraining LDXPX intrinsic selection.
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This repository does not accept pull requests. Please follow http://llvm.org/docs/Contributing.html#how-to-submit-a-patch for contribution to LLVM.

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