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[ARM] Always lower direct calls as direct when the outliner is enabled #66434

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Merged
merged 1 commit into from
Sep 15, 2023
Merged

[ARM] Always lower direct calls as direct when the outliner is enabled #66434

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3 changes: 3 additions & 0 deletions llvm/lib/CodeGen/TargetPassConfig.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1241,6 +1241,9 @@ void TargetPassConfig::addMachinePasses() {
addPass(&LiveDebugValuesID);
addPass(&MachineSanitizerBinaryMetadataID);

if (EnableMachineOutliner == RunOutliner::NeverOutline)
TM->Options.EnableMachineOutliner = false;

if (TM->Options.EnableMachineOutliner &&
getOptLevel() != CodeGenOptLevel::None &&
EnableMachineOutliner != RunOutliner::NeverOutline) {
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8 changes: 8 additions & 0 deletions llvm/lib/Target/ARM/ARMISelLowering.cpp
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Expand Up @@ -2395,6 +2395,14 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
return isa<Instruction>(U) &&
cast<Instruction>(U)->getParent() == BB;
}) > 2;
// The indirect call lowering hinders the MachineOutliner's ability to
// recognize common sequences. The resulting indirect calls all have the
// same target, but the outliner can't tell this a priori, since the
// branch target is turned into a register operand, and those can't (yet?)
// be assumed to have the same value at runtime.
const TargetOptions &Options = DAG.getTarget().Options;
if (Options.EnableMachineOutliner)
PreferIndirect = false;
}
}
if (isTailCall) {
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13 changes: 9 additions & 4 deletions llvm/test/CodeGen/ARM/minsize-call-cse.ll
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@@ -1,12 +1,17 @@
; RUN: llc < %s | FileCheck %s
; RUN: llc < %s | FileCheck %s --check-prefixes=OUTLINER,CHECK
; RUN: llc -enable-machine-outliner=always < %s | FileCheck %s --check-prefixes=OUTLINER,CHECK
; RUN: llc -enable-machine-outliner=never < %s | FileCheck %s --check-prefixes=INDIRECT,CHECK

target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv7m-arm-none-eabi"

; CHECK-LABEL: f:
; CHECK: blx r
; CHECK: blx r
; CHECK: blx r
; OUTLINER: bl g
; OUTLINER: bl g
; OUTLINER: bl g
; INDIRECT: blx r
; INDIRECT: blx r
; INDIRECT: blx r
define void @f() minsize optsize {
entry:
call void @g(i32 45, i32 66)
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/pr42062.ll
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -o - %s 2>&1 | FileCheck %s --implicit-check-not=error
; RUN: llc -o - %s -enable-machine-outliner=never 2>&1 | FileCheck %s --implicit-check-not=error
target triple = "thumbv8m.base-arm-none-eabi"
@foo = external global i8
declare i32 @bar(ptr nocapture, i32, i32, ptr nocapture)
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