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[clang] Enable descriptions for --print-supported-extensions #66715

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Sep 22, 2023
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6 changes: 6 additions & 0 deletions clang/test/Driver/print-supported-extensions.c
Original file line number Diff line number Diff line change
Expand Up @@ -4,14 +4,20 @@
// RUN: %if aarch64-registered-target %{ %clang --target=aarch64-linux-gnu \
// RUN: --print-supported-extensions 2>&1 | FileCheck %s --check-prefix AARCH64 %}
// AARCH64: All available -march extensions for AArch64
// AARCH64: Name Description
// AARCH64: aes Enable AES support (FEAT_AES, FEAT_PMULL)

// RUN: %if riscv-registered-target %{ %clang --target=riscv64-linux-gnu \
// RUN: --print-supported-extensions 2>&1 | FileCheck %s --check-prefix RISCV %}
// RISCV: All available -march extensions for RISC-V
// RISCV: Name Version Description
// RISCV: i 2.1

// RUN: %if arm-registered-target %{ %clang --target=arm-linux-gnu \
// RUN: --print-supported-extensions 2>&1 | FileCheck %s --check-prefix ARM %}
// ARM: All available -march extensions for ARM
// ARM: Name Description
// ARM: crc Enable support for CRC instructions

// RUN: %if x86-registered-target %{ not %clang --target=x86_64-linux-gnu \
// RUN: --print-supported-extensions 2>&1 | FileCheck %s --check-prefix X86 %}
Expand Down
14 changes: 11 additions & 3 deletions clang/tools/driver/cc1_main.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,7 @@
#include "llvm/ADT/Statistic.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/LinkAllPasses.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Option/Arg.h"
#include "llvm/Option/ArgList.h"
Expand Down Expand Up @@ -198,13 +199,20 @@ static int PrintSupportedExtensions(std::string TargetStr) {
std::unique_ptr<llvm::TargetMachine> TheTargetMachine(
TheTarget->createTargetMachine(TargetStr, "", "", Options, std::nullopt));
const llvm::Triple &MachineTriple = TheTargetMachine->getTargetTriple();
const llvm::MCSubtargetInfo *MCInfo = TheTargetMachine->getMCSubtargetInfo();
const llvm::ArrayRef<llvm::SubtargetFeatureKV> Features =
MCInfo->getAllProcessorFeatures();

llvm::StringMap<llvm::StringRef> DescMap;
for (const llvm::SubtargetFeatureKV &feature : Features)
DescMap.insert({feature.Key, feature.Desc});

if (MachineTriple.isRISCV())
llvm::riscvExtensionsHelp();
llvm::riscvExtensionsHelp(DescMap);
else if (MachineTriple.isAArch64())
llvm::AArch64::PrintSupportedExtensions();
llvm::AArch64::PrintSupportedExtensions(DescMap);
else if (MachineTriple.isARM())
llvm::ARM::PrintSupportedExtensions();
llvm::ARM::PrintSupportedExtensions(DescMap);
else {
// The option was already checked in Driver::HandleImmediateArgs,
// so we do not expect to get here if we are not a supported architecture.
Expand Down
6 changes: 6 additions & 0 deletions llvm/include/llvm/MC/MCSubtargetInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -230,10 +230,16 @@ class MCSubtargetInfo {
return Found != ProcDesc.end() && StringRef(Found->Key) == CPU;
}

/// Return processor descriptions.
ArrayRef<SubtargetSubTypeKV> getAllProcessorDescriptions() const {
return ProcDesc;
}

/// Return processor features.
ArrayRef<SubtargetFeatureKV> getAllProcessorFeatures() const {
return ProcFeatures;
}

virtual unsigned getHwMode() const { return 0; }

/// Return the cache size in bytes for the given level of cache.
Expand Down
3 changes: 2 additions & 1 deletion llvm/include/llvm/Support/RISCVISAInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@
#ifndef LLVM_SUPPORT_RISCVISAINFO_H
#define LLVM_SUPPORT_RISCVISAINFO_H

#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"

Expand All @@ -22,7 +23,7 @@ struct RISCVExtensionInfo {
unsigned MinorVersion;
};

void riscvExtensionsHelp();
void riscvExtensionsHelp(StringMap<StringRef> DescMap);

class RISCVISAInfo {
public:
Expand Down
3 changes: 2 additions & 1 deletion llvm/include/llvm/TargetParser/AArch64TargetParser.h
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@

#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/Bitset.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/VersionTuple.h"
#include <array>
Expand Down Expand Up @@ -663,7 +664,7 @@ bool isX18ReservedByDefault(const Triple &TT);
// themselves, they are sequential (0, 1, 2, 3, ...).
uint64_t getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs);

void PrintSupportedExtensions();
void PrintSupportedExtensions(StringMap<StringRef> DescMap);

} // namespace AArch64
} // namespace llvm
Expand Down
3 changes: 2 additions & 1 deletion llvm/include/llvm/TargetParser/ARMTargetParser.h
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@
#ifndef LLVM_TARGETPARSER_ARMTARGETPARSER_H
#define LLVM_TARGETPARSER_ARMTARGETPARSER_H

#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/ARMBuildAttributes.h"
#include "llvm/TargetParser/ARMTargetParserCommon.h"
Expand Down Expand Up @@ -259,7 +260,7 @@ StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);
/// string then the triple's arch name is used.
StringRef getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch = {});

void PrintSupportedExtensions();
void PrintSupportedExtensions(StringMap<StringRef> DescMap);

} // namespace ARM
} // namespace llvm
Expand Down
28 changes: 20 additions & 8 deletions llvm/lib/Support/RISCVISAInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -210,24 +210,36 @@ static void verifyTables() {
#endif
}

void llvm::riscvExtensionsHelp() {
static void PrintExtension(const std::string Name, const std::string Version,
const std::string Description) {
outs() << " "
<< format(Description.empty() ? "%-20s%s\n" : "%-20s%-10s%s\n",
Name.c_str(), Version.c_str(), Description.c_str());
}

void llvm::riscvExtensionsHelp(StringMap<StringRef> DescMap) {

outs() << "All available -march extensions for RISC-V\n\n";
outs() << '\t' << left_justify("Name", 20) << "Version\n";
PrintExtension("Name", "Version", (DescMap.empty() ? "" : "Description"));

RISCVISAInfo::OrderedExtensionMap ExtMap;
for (const auto &E : SupportedExtensions)
ExtMap[E.Name] = {E.Version.Major, E.Version.Minor};
for (const auto &E : ExtMap)
outs() << format("\t%-20s%d.%d\n", E.first.c_str(), E.second.MajorVersion,
E.second.MinorVersion);
for (const auto &E : ExtMap) {
std::string Version = std::to_string(E.second.MajorVersion) + "." +
std::to_string(E.second.MinorVersion);
PrintExtension(E.first, Version, DescMap[E.first].str());
}

outs() << "\nExperimental extensions\n";
ExtMap.clear();
for (const auto &E : SupportedExperimentalExtensions)
ExtMap[E.Name] = {E.Version.Major, E.Version.Minor};
for (const auto &E : ExtMap)
outs() << format("\t%-20s%d.%d\n", E.first.c_str(), E.second.MajorVersion,
E.second.MinorVersion);
for (const auto &E : ExtMap) {
std::string Version = std::to_string(E.second.MajorVersion) + "." +
std::to_string(E.second.MinorVersion);
PrintExtension(E.first, Version, DescMap["experimental-" + E.first].str());
}

outs() << "\nUse -march to specify the target's extension.\n"
"For example, clang -march=rv32i_v1p0\n";
Expand Down
15 changes: 11 additions & 4 deletions llvm/lib/TargetParser/AArch64TargetParser.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===//

#include "llvm/TargetParser/AArch64TargetParser.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TargetParser/ARMTargetParserCommon.h"
#include "llvm/TargetParser/Triple.h"
Expand Down Expand Up @@ -135,11 +136,17 @@ std::optional<AArch64::CpuInfo> AArch64::parseCpu(StringRef Name) {
return {};
}

void AArch64::PrintSupportedExtensions() {
outs() << "All available -march extensions for AArch64\n\n";
void AArch64::PrintSupportedExtensions(StringMap<StringRef> DescMap) {
outs() << "All available -march extensions for AArch64\n\n"
<< " " << left_justify("Name", 20)
<< (DescMap.empty() ? "\n" : "Description\n");
for (const auto &Ext : Extensions) {
// Extensions without a feature cannot be used with -march.
if (!Ext.Feature.empty())
outs() << '\t' << Ext.Name << "\n";
if (!Ext.Feature.empty()) {
std::string Description = DescMap[Ext.Name].str();
outs() << " "
<< format(Description.empty() ? "%s\n" : "%-20s%s\n",
Ext.Name.str().c_str(), Description.c_str());
}
}
}
15 changes: 11 additions & 4 deletions llvm/lib/TargetParser/ARMTargetParser.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@

#include "llvm/TargetParser/ARMTargetParser.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TargetParser/ARMTargetParserCommon.h"
#include "llvm/TargetParser/Triple.h"
Expand Down Expand Up @@ -600,11 +601,17 @@ StringRef ARM::getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch) {
llvm_unreachable("invalid arch name");
}

void ARM::PrintSupportedExtensions() {
outs() << "All available -march extensions for ARM\n\n";
void ARM::PrintSupportedExtensions(StringMap<StringRef> DescMap) {
outs() << "All available -march extensions for ARM\n\n"
<< " " << left_justify("Name", 20)
<< (DescMap.empty() ? "\n" : "Description\n");
for (const auto &Ext : ARCHExtNames) {
// Extensions without a feature cannot be used with -march.
if (!Ext.Feature.empty())
outs() << '\t' << Ext.Name << "\n";
if (!Ext.Feature.empty()) {
std::string Description = DescMap[Ext.Name].str();
outs() << " "
<< format(Description.empty() ? "%s\n" : "%-20s%s\n",
Ext.Name.str().c_str(), Description.c_str());
}
}
}
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