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3 changes: 3 additions & 0 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1087,6 +1087,9 @@ void SelectionDAG::RemoveDeadNode(SDNode *N){
}

void SelectionDAG::DeleteNode(SDNode *N) {
for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
DUL->NodeDeleted(N, nullptr);

// First take this out of the appropriate CSE map.
RemoveNodeFromCSEMaps(N);

Expand Down
146 changes: 73 additions & 73 deletions llvm/test/CodeGen/AMDGPU/half.ll
Original file line number Diff line number Diff line change
Expand Up @@ -2317,7 +2317,7 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v18, s3
; VI-NEXT: v_mov_b32_e32 v17, s2
; VI-NEXT: s_add_u32 s2, s0, 0x50
; VI-NEXT: s_add_u32 s2, s0, 0x70
; VI-NEXT: v_mov_b32_e32 v12, s1
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v11, s0
Expand All @@ -2331,12 +2331,12 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out
; VI-NEXT: v_cvt_f32_f16_e32 v7, v6
; VI-NEXT: v_cvt_f32_f16_sdwa v8, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_cvt_f32_f16_e32 v10, v2
; VI-NEXT: v_cvt_f32_f16_e32 v10, v0
; VI-NEXT: v_mov_b32_e32 v14, s3
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v7
; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8
; VI-NEXT: v_mov_b32_e32 v13, s2
; VI-NEXT: s_add_u32 s2, s0, 64
; VI-NEXT: s_add_u32 s2, s0, 0x60
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: flat_store_dwordx4 v[15:16], v[6:9]
; VI-NEXT: v_mov_b32_e32 v16, s3
Expand All @@ -2347,37 +2347,37 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out
; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v6
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v7
; VI-NEXT: v_mov_b32_e32 v15, s2
; VI-NEXT: s_add_u32 s2, s0, 0x70
; VI-NEXT: s_add_u32 s2, s0, 0x50
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: flat_store_dwordx4 v[17:18], v[4:7]
; VI-NEXT: v_cvt_f32_f16_sdwa v17, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_sdwa v17, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v8
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v9
; VI-NEXT: v_cvt_f32_f16_sdwa v9, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_sdwa v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_e32 v2, v1
; VI-NEXT: v_cvt_f32_f16_sdwa v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_e32 v0, v3
; VI-NEXT: s_add_u32 s0, s0, 64
; VI-NEXT: flat_store_dwordx4 v[11:12], v[4:7]
; VI-NEXT: v_cvt_f32_f16_sdwa v11, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_e32 v7, v3
; VI-NEXT: v_cvt_f64_f32_e32 v[3:4], v9
; VI-NEXT: v_cvt_f32_f16_e32 v9, v0
; VI-NEXT: v_cvt_f64_f32_e32 v[1:2], v2
; VI-NEXT: v_cvt_f64_f32_e32 v[5:6], v10
; VI-NEXT: v_cvt_f64_f32_e32 v[11:12], v11
; VI-NEXT: v_cvt_f64_f32_e32 v[9:10], v9
; VI-NEXT: s_add_u32 s0, s0, 0x60
; VI-NEXT: flat_store_dwordx4 v[13:14], v[1:4]
; VI-NEXT: v_cvt_f32_f16_sdwa v12, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f64_f32_e32 v[5:6], v8
; VI-NEXT: v_cvt_f32_f16_e32 v8, v2
; VI-NEXT: v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_e32 v7, v1
; VI-NEXT: v_cvt_f64_f32_e32 v[3:4], v0
; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v10
; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8
; VI-NEXT: v_cvt_f64_f32_e32 v[10:11], v2
; VI-NEXT: flat_store_dwordx4 v[13:14], v[3:6]
; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v7
; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v7
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v12
; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v17
; VI-NEXT: v_cvt_f64_f32_e32 v[7:8], v8
; VI-NEXT: v_mov_b32_e32 v20, s3
; VI-NEXT: v_mov_b32_e32 v14, s1
; VI-NEXT: v_mov_b32_e32 v13, s1
; VI-NEXT: v_mov_b32_e32 v19, s2
; VI-NEXT: v_mov_b32_e32 v13, s0
; VI-NEXT: flat_store_dwordx4 v[15:16], v[9:12]
; VI-NEXT: flat_store_dwordx4 v[19:20], v[0:3]
; VI-NEXT: flat_store_dwordx4 v[13:14], v[5:8]
; VI-NEXT: v_mov_b32_e32 v12, s0
; VI-NEXT: flat_store_dwordx4 v[15:16], v[8:11]
; VI-NEXT: flat_store_dwordx4 v[19:20], v[4:7]
; VI-NEXT: flat_store_dwordx4 v[12:13], v[0:3]
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: global_extload_v16f16_to_v16f64:
Expand All @@ -2389,40 +2389,40 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v32, s[2:3]
; GFX11-TRUE16-NEXT: global_load_b128 v[4:7], v32, s[2:3] offset:16
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v10, v1.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v4
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v15, v7.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v23, v7.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v14, v6.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v22, v6.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v5
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v10, v1.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v4
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v13, v3.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v12, v2.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v18, v4.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v22, v5.l
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v10
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v10, v23.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v34, v11.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v11, v19.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v7, v7.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v6, v6.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v18, v5.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v34, v11.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v11, v19.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v14, v4.l
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v10
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v10, v15.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v8, v0.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v3.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v2.l
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[28:29], v22
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[30:31], v10
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[24:25], v18
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[26:27], v11
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[28:29], v23
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[30:31], v7
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[24:25], v22
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[26:27], v6
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v33, v9.l
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[20:21], v15
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[22:23], v7
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[20:21], v18
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[22:23], v11
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[16:17], v14
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[18:19], v6
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[18:19], v10
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v8
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[8:9], v12
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[12:13], v13
Expand All @@ -2431,10 +2431,10 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[6:7], v34
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v33
; GFX11-TRUE16-NEXT: s_clause 0x7
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[28:31], s[0:1] offset:80
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[24:27], s[0:1] offset:64
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[20:23], s[0:1] offset:112
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[16:19], s[0:1] offset:96
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[28:31], s[0:1] offset:112
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[24:27], s[0:1] offset:96
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[20:23], s[0:1] offset:80
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[16:19], s[0:1] offset:64
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[12:15], s[0:1] offset:48
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[8:11], s[0:1] offset:32
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[4:7], s[0:1] offset:16
Expand All @@ -2450,40 +2450,40 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out
; GFX11-FAKE16-NEXT: global_load_b128 v[0:3], v32, s[2:3]
; GFX11-FAKE16-NEXT: global_load_b128 v[4:7], v32, s[2:3] offset:16
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v10, v1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v5
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v4
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v15, v7
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v23, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v14, v6
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v22, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v5
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v10, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v4
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v13, v3
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v12, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v18, v4
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v22, v5
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v10
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v10, v23
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v34, v11
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v11, v19
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v7, v7
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v6, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v18, v5
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v34, v11
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v11, v19
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v14, v4
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v10
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v10, v15
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v8, v0
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v3, v3
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, v2
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[28:29], v22
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[30:31], v10
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[24:25], v18
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[26:27], v11
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[28:29], v23
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[30:31], v7
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[24:25], v22
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[26:27], v6
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v33, v9
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[20:21], v15
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[22:23], v7
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[20:21], v18
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[22:23], v11
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[16:17], v14
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[18:19], v6
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[18:19], v10
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v8
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[8:9], v12
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[12:13], v13
Expand All @@ -2492,10 +2492,10 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[6:7], v34
; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v33
; GFX11-FAKE16-NEXT: s_clause 0x7
; GFX11-FAKE16-NEXT: global_store_b128 v32, v[28:31], s[0:1] offset:80
; GFX11-FAKE16-NEXT: global_store_b128 v32, v[24:27], s[0:1] offset:64
; GFX11-FAKE16-NEXT: global_store_b128 v32, v[20:23], s[0:1] offset:112
; GFX11-FAKE16-NEXT: global_store_b128 v32, v[16:19], s[0:1] offset:96
; GFX11-FAKE16-NEXT: global_store_b128 v32, v[28:31], s[0:1] offset:112
; GFX11-FAKE16-NEXT: global_store_b128 v32, v[24:27], s[0:1] offset:96
; GFX11-FAKE16-NEXT: global_store_b128 v32, v[20:23], s[0:1] offset:80
; GFX11-FAKE16-NEXT: global_store_b128 v32, v[16:19], s[0:1] offset:64
; GFX11-FAKE16-NEXT: global_store_b128 v32, v[12:15], s[0:1] offset:48
; GFX11-FAKE16-NEXT: global_store_b128 v32, v[8:11], s[0:1] offset:32
; GFX11-FAKE16-NEXT: global_store_b128 v32, v[4:7], s[0:1] offset:16
Expand Down
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