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[mlir] enable python bindings for nvgpu transforms #68088

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Merged
merged 2 commits into from
Oct 3, 2023

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ftynse
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@ftynse ftynse commented Oct 3, 2023

Expose the autogenerated bindings.

Expose the autogenerated bindings.

Co-authored-by: Martin Lücke <[email protected]>
@ftynse ftynse requested a review from martin-luecke October 3, 2023 10:57
@llvmbot llvmbot added mlir:python MLIR Python bindings mlir labels Oct 3, 2023
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llvmbot commented Oct 3, 2023

@llvm/pr-subscribers-mlir

Changes

Expose the autogenerated bindings.


Full diff: https://github.com/llvm/llvm-project/pull/68088.diff

5 Files Affected:

  • (modified) mlir/python/CMakeLists.txt (+9)
  • (added) mlir/python/mlir/dialects/NVGPUTransformOps.td (+20)
  • (added) mlir/python/mlir/dialects/transform/nvgpu.py (+5)
  • (added) mlir/test/python/dialects/transform_nvgpu_ext.py (+27)
  • (modified) utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel (+20)
diff --git a/mlir/python/CMakeLists.txt b/mlir/python/CMakeLists.txt
index 9368cb4c2f1657f..f09c79a0a88e718 100644
--- a/mlir/python/CMakeLists.txt
+++ b/mlir/python/CMakeLists.txt
@@ -200,6 +200,15 @@ declare_mlir_dialect_extension_python_bindings(
   DIALECT_NAME transform
   EXTENSION_NAME memref_transform)
 
+declare_mlir_dialect_extension_python_bindings(
+ADD_TO_PARENT MLIRPythonSources.Dialects
+ROOT_DIR "${CMAKE_CURRENT_SOURCE_DIR}/mlir"
+  TD_FILE dialects/NVGPUTransformOps.td
+  SOURCES
+    dialects/transform/nvgpu.py
+  DIALECT_NAME transform
+  EXTENSION_NAME nvgpu_transform)
+
 declare_mlir_dialect_extension_python_bindings(
   ADD_TO_PARENT MLIRPythonSources.Dialects
   ROOT_DIR "${CMAKE_CURRENT_SOURCE_DIR}/mlir"
diff --git a/mlir/python/mlir/dialects/NVGPUTransformOps.td b/mlir/python/mlir/dialects/NVGPUTransformOps.td
new file mode 100644
index 000000000000000..1f504e3220e92de
--- /dev/null
+++ b/mlir/python/mlir/dialects/NVGPUTransformOps.td
@@ -0,0 +1,20 @@
+//===-- NVGPUTransformOps.td -------------------------------*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// Entry point of the Python bindings generator for the transform ops provided
+// by the NVGPU dialect.
+//
+//===----------------------------------------------------------------------===//
+
+
+#ifndef PYTHON_BINDINGS_NVGPU_TRANSFORM_OPS
+#define PYTHON_BINDINGS_NVGPU_TRANSFORM_OPS
+
+include "mlir/Dialect/NVGPU/TransformOps/NVGPUTransformOps.td"
+
+#endif // PYTHON_BINDINGS_NVGPU_TRANSFORM_OPS
diff --git a/mlir/python/mlir/dialects/transform/nvgpu.py b/mlir/python/mlir/dialects/transform/nvgpu.py
new file mode 100644
index 000000000000000..74ba4c9aeb6c107
--- /dev/null
+++ b/mlir/python/mlir/dialects/transform/nvgpu.py
@@ -0,0 +1,5 @@
+#  Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+#  See https://llvm.org/LICENSE.txt for license information.
+#  SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+from .._nvgpu_transform_ops_gen import *
diff --git a/mlir/test/python/dialects/transform_nvgpu_ext.py b/mlir/test/python/dialects/transform_nvgpu_ext.py
new file mode 100644
index 000000000000000..1de8b25bab7a5c6
--- /dev/null
+++ b/mlir/test/python/dialects/transform_nvgpu_ext.py
@@ -0,0 +1,27 @@
+# RUN: %PYTHON %s | FileCheck %s
+
+from mlir.ir import *
+from mlir.dialects import transform
+from mlir.dialects.transform import nvgpu
+
+
+def run(f):
+    with Context(), Location.unknown():
+        module = Module.create()
+        with InsertionPoint(module.body):
+            print("\nTEST:", f.__name__)
+            f()
+        print(module)
+    return f
+
+
+@run
+def testCreateAsyncGroups():
+    sequence = transform.SequenceOp(
+        transform.FailurePropagationMode.Propagate, [], transform.AnyOpType.get()
+    )
+    with InsertionPoint(sequence.body):
+        nvgpu.CreateAsyncGroupsOp(transform.AnyOpType.get(), sequence.bodyTarget)
+        transform.YieldOp()
+    # CHECK-LABEL: TEST: testCreateAsyncGroups
+    # CHECK: transform.nvgpu.create_async_groups
diff --git a/utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel b/utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
index b8b70f4685feaef..949bfa4fbda3a6c 100644
--- a/utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
+++ b/utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
@@ -1209,6 +1209,25 @@ gentbl_filegroup(
     ],
 )
 
+gentbl_filegroup(
+    name = "NVGPUTransformOpsPyGen",
+    tbl_outs = [
+        (
+            [
+                "-gen-python-op-bindings",
+                "-bind-dialect=transform",
+                "-dialect-extension=nvgpu_transform",
+            ],
+            "mlir/dialects/_nvgpu_transform_ops_gen.py",
+        ),
+    ],
+    tblgen = "//mlir:mlir-tblgen",
+    td_file = "mlir/dialects/NVGPUTransformOps.td",
+    deps = [
+        "//mlir:NVGPUTransformOpsTdFiles",
+    ],
+)
+
 gentbl_filegroup(
     name = "PDLTransformOpsPyGen",
     tbl_outs = [
@@ -1327,6 +1346,7 @@ filegroup(
         ":GPUTransformOpsPyGen",
         ":LoopTransformOpsPyGen",
         ":MemRefTransformOpsPyGen",
+        ":NVGPUTransformOpsPyGen",
         ":PDLTransformOpsPyGen",
         ":SparseTensorTransformOpsPyGen",
         ":StructureTransformEnumPyGen",

@ftynse ftynse requested a review from ingomueller-net October 3, 2023 12:07
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LGTM modulo tiny white space nit

@ftynse ftynse merged commit bc30b41 into llvm:main Oct 3, 2023
@ftynse ftynse deleted the nvgpu-transform branch October 3, 2023 12:52
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3 participants