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[AIX] recognize vsr in inline asm for AIX #68476

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Merged
merged 3 commits into from
Oct 12, 2023

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chenzheng1030
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@chenzheng1030 chenzheng1030 commented Oct 7, 2023

Extend PPCTargetInfo::getGCCAddlRegNames() to aix as well. The definition should be common between Linux PPC and AIX PPC.

@llvmbot llvmbot added clang Clang issues not falling into any other category clang:frontend Language frontend issues, e.g. anything involving "Sema" labels Oct 7, 2023
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llvmbot commented Oct 7, 2023

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Extend PPCTargetInfo::getGCCAddlRegNames() to aix as well. The definition should be common between Linux PPC and AIX PPC.

I also use "abi" as the ABI name for AIX ABI. This aligns with LLVM PPCSubtarget:

  bool isAIXABI() const { return TargetTriple.isOSAIX(); }
  bool isSVR4ABI() const { return !isAIXABI(); }
  bool isELFv2ABI() const;

Full diff: https://github.com/llvm/llvm-project/pull/68476.diff

3 Files Affected:

  • (modified) clang/lib/Basic/Targets/PPC.cpp (+2-1)
  • (modified) clang/lib/Basic/Targets/PPC.h (+2-1)
  • (modified) clang/test/CodeGen/PowerPC/inline-asm-matching-ppc-vsx.c (+4)
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index e0abc069032e1ce..fa56d39fd2fdada 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -807,6 +807,7 @@ ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const {
 // PPC ELFABIv2 DWARF Definitoin "Table 2.26. Mappings of Common Registers".
 // vs0 ~ vs31 is mapping to 32 - 63,
 // vs32 ~ vs63 is mapping to 77 - 108.
+// And this mapping applies to all OSes which runs on powerpc.
 const TargetInfo::AddlRegName GCCAddlRegNames[] = {
     // Table of additional register names to use in user input.
     {{"vs0"}, 32},   {{"vs1"}, 33},   {{"vs2"}, 34},   {{"vs3"}, 35},
@@ -828,7 +829,7 @@ const TargetInfo::AddlRegName GCCAddlRegNames[] = {
 };
 
 ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
-  if (ABI == "elfv2")
+  if (ABI == "elfv2" || ABI == "aix")
     return llvm::ArrayRef(GCCAddlRegNames);
   else
     return TargetInfo::getGCCAddlRegNames();
diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index ef667b3d511f0e6..c2a18d77a60a510 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -385,6 +385,7 @@ class LLVM_LIBRARY_VISIBILITY PPC32TargetInfo : public PPCTargetInfo {
       LongDoubleWidth = 64;
       LongDoubleAlign = DoubleAlign = 32;
       LongDoubleFormat = &llvm::APFloat::IEEEdouble();
+      ABI = "aix";
       break;
     default:
       break;
@@ -418,11 +419,11 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public PPCTargetInfo {
     std::string DataLayout;
 
     if (Triple.isOSAIX()) {
-      // TODO: Set appropriate ABI for AIX platform.
       DataLayout = "E-m:a-Fi64-i64:64-n32:64";
       LongDoubleWidth = 64;
       LongDoubleAlign = DoubleAlign = 32;
       LongDoubleFormat = &llvm::APFloat::IEEEdouble();
+      ABI = "aix";
     } else if ((Triple.getArch() == llvm::Triple::ppc64le)) {
       DataLayout = "e-m:e-Fn32-i64:64-n32:64";
       ABI = "elfv2";
diff --git a/clang/test/CodeGen/PowerPC/inline-asm-matching-ppc-vsx.c b/clang/test/CodeGen/PowerPC/inline-asm-matching-ppc-vsx.c
index a4fabd688175e14..a8033f22073cc9f 100644
--- a/clang/test/CodeGen/PowerPC/inline-asm-matching-ppc-vsx.c
+++ b/clang/test/CodeGen/PowerPC/inline-asm-matching-ppc-vsx.c
@@ -2,6 +2,10 @@
 
 // RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -target-feature +vsx \
 // RUN:   -target-cpu pwr9 -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix -target-feature +vsx \
+// RUN:   -target-cpu pwr9 -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix -target-feature +vsx \
+// RUN:   -target-cpu pwr9 -emit-llvm %s -o - | FileCheck %s
 
 // This case is to test VSX register support in the clobbers list for inline asm.
 void testVSX (void) {

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LGTM, but I am not sure if @stefanp-ibm continues to be concerned about enabling this for ABIs that have not been updated to specify a treatment of the VSX registers.

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Thank you for fixing this!
LGTM.

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The code formatting check failure seems to be a infrastructure problem: https://discourse.llvm.org/t/clang-format-github-action-cannot-find-merge-base/73894

@chenzheng1030 chenzheng1030 merged commit c661c4f into llvm:main Oct 12, 2023
@chenzheng1030 chenzheng1030 deleted the aix_vsr branch October 12, 2023 00:54
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