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Merged
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Oct 19, 2023
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InlineSpiller: Delete assert that implicit_def has no implicit operands #69087

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3 changes: 1 addition & 2 deletions llvm/lib/CodeGen/InlineSpiller.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1071,8 +1071,7 @@ void InlineSpiller::insertReload(Register NewVReg,
static bool isRealSpill(const MachineInstr &Def) {
if (!Def.isImplicitDef())
return true;
assert(Def.getNumOperands() == 1 &&
"Implicit def with more than one definition");

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If we really want to keep an assert here, we could check that we have only one explicit operand.
Don't think that's worth it though.

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The verifier handles that case

// We can say that the VReg defined by Def is undef, only if it is
// fully defined by Def. Otherwise, some of the lanes may not be
// undef and the value of the VReg matters.
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181 changes: 181 additions & 0 deletions llvm/test/CodeGen/AArch64/implicit-def-with-impdef-greedy-assert.mir
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@@ -0,0 +1,181 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
# RUN: llc -mtriple=arm64-apple-ios -run-pass=greedy -o - %s | FileCheck %s

---
name: widget
tracksRegLiveness: true
jumpTable:
kind: label-difference32
entries:
- id: 0
blocks: [ '%bb.9', '%bb.5', '%bb.2', '%bb.2', '%bb.2' ]
body: |
; CHECK-LABEL: name: widget
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: liveins: $w0, $w1, $x2, $x3, $x4, $w5, $w6
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr64common = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:gpr64 = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:gpr32common = IMPLICIT_DEF
; CHECK-NEXT: [[DEF3:%[0-9]+]]:gpr32 = IMPLICIT_DEF
; CHECK-NEXT: [[DEF4:%[0-9]+]]:gpr32 = IMPLICIT_DEF
; CHECK-NEXT: [[DEF5:%[0-9]+]]:gpr64common = IMPLICIT_DEF
; CHECK-NEXT: [[DEF6:%[0-9]+]]:gpr32 = IMPLICIT_DEF
; CHECK-NEXT: undef [[DEF7:%[0-9]+]].sub_32:gpr64 = IMPLICIT_DEF
; CHECK-NEXT: [[DEF8:%[0-9]+]]:gpr64common = IMPLICIT_DEF
; CHECK-NEXT: [[DEF9:%[0-9]+]]:gpr32 = IMPLICIT_DEF
; CHECK-NEXT: dead [[DEF10:%[0-9]+]]:gpr64 = IMPLICIT_DEF
; CHECK-NEXT: undef [[DEF11:%[0-9]+]].sub_32:gpr64 = IMPLICIT_DEF implicit-def dead %11
; CHECK-NEXT: STRXui [[DEF11]], %stack.0, 0 :: (store (s64) into %stack.0)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x0fbefbf0), %bb.4(0x70410410)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: Bcc 8, %bb.3, implicit killed undef $nzcv
; CHECK-NEXT: B %bb.4
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
; CHECK-NEXT: successors: %bb.11(0x00000000), %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: dead $wzr = SUBSWri [[DEF2]], 64, 0, implicit-def $nzcv
; CHECK-NEXT: Bcc 0, %bb.11, implicit killed undef $nzcv
; CHECK-NEXT: B %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.4:
; CHECK-NEXT: successors: %bb.9(0x01288b01), %bb.5(0x01288b01), %bb.2(0x11f46a91), %bb.6(0x23e8d524), %bb.7(0x47d1aa49)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: dead early-clobber %12:gpr64, dead early-clobber %13:gpr64sp = JumpTableDest32 [[DEF8]], [[DEF7]], %jump-table.0
; CHECK-NEXT: BR undef %18:gpr64
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.5:
; CHECK-NEXT: successors: %bb.8(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: B %bb.8
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.6:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: STRWui [[DEF9]], [[DEF5]], 0 :: (store (s32))
; CHECK-NEXT: B %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.7:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: STRWui $wzr, [[DEF]], 0 :: (store (s32))
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: $w0 = COPY [[DEF4]]
; CHECK-NEXT: $x1 = COPY [[DEF1]]
; CHECK-NEXT: BL 0, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def dead $w0
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: $w0 = COPY [[DEF6]]
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: B %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.8:
; CHECK-NEXT: successors: %bb.8(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: B %bb.8
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.9:
; CHECK-NEXT: successors: %bb.10(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: undef [[DEF12:%[0-9]+]].sub_32:gpr64 = IMPLICIT_DEF
; CHECK-NEXT: STRXui [[DEF12]], %stack.0, 0 :: (store (s64) into %stack.0)
; CHECK-NEXT: TBZW [[DEF3]], 0, %bb.1
; CHECK-NEXT: B %bb.10
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.10:
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN 32, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: ADJCALLSTACKUP 32, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.11:
; CHECK-NEXT: [[LDRXui:%[0-9]+]]:gpr64 = LDRXui %stack.0, 0 :: (load (s64) from %stack.0)
; CHECK-NEXT: dead undef [[COPY:%[0-9]+]].sub_32:gpr64 = COPY [[LDRXui]].sub_32
; CHECK-NEXT: ADJCALLSTACKDOWN 8, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: ADJCALLSTACKUP 8, 0, implicit-def dead $sp, implicit $sp
bb.0:
liveins: $w0, $w1, $x2, $x3, $x4, $w5, $w6

%0:gpr64common = IMPLICIT_DEF
%1:gpr64 = IMPLICIT_DEF
%2:gpr32common = IMPLICIT_DEF
%3:gpr32 = IMPLICIT_DEF
%4:gpr32 = IMPLICIT_DEF
%5:gpr64common = IMPLICIT_DEF
%6:gpr32 = IMPLICIT_DEF
undef %7.sub_32:gpr64 = IMPLICIT_DEF
%8:gpr64common = IMPLICIT_DEF
%9:gpr32 = IMPLICIT_DEF
%10:gpr64 = IMPLICIT_DEF
undef %10.sub_32:gpr64 = IMPLICIT_DEF implicit-def %11:gpr64

bb.1:

bb.2:
successors: %bb.3(0x0fbefbf0), %bb.4(0x70410410)

Bcc 8, %bb.3, implicit killed undef $nzcv
B %bb.4

bb.3:
successors: %bb.11(0x00000000), %bb.2(0x80000000)

dead $wzr = SUBSWri %2, 64, 0, implicit-def $nzcv
Bcc 0, %bb.11, implicit killed undef $nzcv
B %bb.2

bb.4:
successors: %bb.9(0x01288b01), %bb.5(0x01288b01), %bb.2(0x11f46a91), %bb.6(0x23e8d524), %bb.7(0x47d1aa49)

early-clobber %12:gpr64, dead early-clobber %13:gpr64sp = JumpTableDest32 %8, %7, %jump-table.0
BR undef %10

bb.5:
B %bb.8

bb.6:
STRWui %9, %5, 0 :: (store (s32))
B %bb.2

bb.7:
STRWui $wzr, %0, 0 :: (store (s32))
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
$w0 = COPY %4
$x1 = COPY %1
BL 0, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def dead $w0
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
$w0 = COPY %6
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
B %bb.2

bb.8:
B %bb.8

bb.9:
successors: %bb.10, %bb.1

undef %10.sub_32:gpr64 = IMPLICIT_DEF
TBZW %3, 0, %bb.1
B %bb.10

bb.10:
ADJCALLSTACKDOWN 32, 0, implicit-def dead $sp, implicit $sp
ADJCALLSTACKUP 32, 0, implicit-def dead $sp, implicit $sp
B %bb.1

bb.11:
undef %14.sub_32:gpr64 = COPY %10.sub_32
ADJCALLSTACKDOWN 8, 0, implicit-def dead $sp, implicit $sp
ADJCALLSTACKUP 8, 0, implicit-def dead $sp, implicit $sp

...
178 changes: 178 additions & 0 deletions llvm/test/CodeGen/X86/inline-spiller-impdef-on-implicit-def-regression.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s

; Make sure there's no assert on an implicit-def with implicit operands
; during register allocation.

%struct.BlockContext = type { [32 x i8], [32 x i8], [2 x [32 x i8]], [32 x i8], [32 x i8], [32 x i8], [32 x i8], [32 x i8], [2 x [32 x i8]], [2 x [32 x i8]], [32 x i8], [32 x i8], [32 x i8], [32 x i8], [16 x i8], [32 x i8], [32 x i8] }
%struct.CdfModeContext = type { [4 x [16 x i16]], [2 x [13 x [16 x i16]]], [9 x [16 x i16]], [5 x [4 x [16 x i16]]], [6 x [16 x i16]], [2 x [16 x i16]], [16 x i16], [2 x [13 x [8 x i16]]], [3 x [13 x [8 x i16]]], [8 x i16], [8 x [8 x i16]], [8 x i16], [8 x [8 x i16]], [3 x [8 x i16]], [2 x [7 x [8 x i16]]], [2 x [7 x [5 x [8 x i16]]]], [2 x [8 x [4 x i16]]], [4 x [3 x [4 x i16]]], [22 x [4 x i16]], [4 x i16], [5 x [4 x i16]], [4 x [4 x i16]], [4 x i16], [2 x i16], [2 x i16], [7 x [2 x i16]], [7 x [2 x i16]], [4 x [2 x i16]], [22 x [2 x i16]], [6 x [2 x i16]], [2 x [2 x i16]], [6 x [2 x i16]], [3 x [2 x i16]], [4 x [2 x i16]], [5 x [2 x i16]], [5 x [2 x i16]], [6 x [2 x i16]], [6 x [2 x i16]], [9 x [2 x i16]], [6 x [3 x [2 x i16]]], [3 x [3 x [2 x i16]]], [2 x [3 x [2 x i16]]], [3 x [3 x [2 x i16]]], [7 x [3 x [2 x i16]]], [3 x [2 x i16]], [3 x [2 x i16]], [3 x [2 x i16]], [22 x [2 x i16]], [7 x [3 x [2 x i16]]], [2 x [2 x i16]], [2 x i16], [8 x i8] }

define i32 @decode_sb(ptr %t, i32 %bl, i32 %_msprop1966, i32 %sub.i, i64 %idxprom, i1 %cmp54) #0 {
; CHECK-LABEL: decode_sb:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbp, -16
; CHECK-NEXT: movq %rsp, %rbp
; CHECK-NEXT: .cfi_def_cfa_register %rbp
; CHECK-NEXT: pushq %r15
; CHECK-NEXT: pushq %r14
; CHECK-NEXT: pushq %r13
; CHECK-NEXT: pushq %r12
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_offset %rbx, -56
; CHECK-NEXT: .cfi_offset %r12, -48
; CHECK-NEXT: .cfi_offset %r13, -40
; CHECK-NEXT: .cfi_offset %r14, -32
; CHECK-NEXT: .cfi_offset %r15, -24
; CHECK-NEXT: movl %r9d, %ebx
; CHECK-NEXT: movabsq $87960930222080, %r15 # imm = 0x500000000000
; CHECK-NEXT: movl 0, %r13d
; CHECK-NEXT: movl %esi, %r12d
; CHECK-NEXT: # implicit-def: $eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: testb $1, %bl
; CHECK-NEXT: jne .LBB0_7
; CHECK-NEXT: # %bb.1: # %if.else
; CHECK-NEXT: movq %r8, %r14
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: andl $1, %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movzbl 544(%rax), %eax
; CHECK-NEXT: andl $1, %eax
; CHECK-NEXT: movl %r15d, %r9d
; CHECK-NEXT: andl $1, %r9d
; CHECK-NEXT: movl %r14d, %r10d
; CHECK-NEXT: andl $1, %r10d
; CHECK-NEXT: movl %esi, %r11d
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrl %cl, %r11d
; CHECK-NEXT: movabsq $17592186044416, %r8 # imm = 0x100000000000
; CHECK-NEXT: orq %r10, %r8
; CHECK-NEXT: andl $2, %r11d
; CHECK-NEXT: testb $1, %bl
; CHECK-NEXT: cmoveq %r9, %r8
; CHECK-NEXT: movl %edx, %ecx
; CHECK-NEXT: orq %rax, %rcx
; CHECK-NEXT: movq %r13, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: orq $1, %r13
; CHECK-NEXT: orl %esi, %r11d
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: je .LBB0_3
; CHECK-NEXT: # %bb.2: # %if.else
; CHECK-NEXT: movl (%r8), %edx
; CHECK-NEXT: .LBB0_3: # %if.else
; CHECK-NEXT: shlq $5, %rcx
; CHECK-NEXT: movq %r12, %rsi
; CHECK-NEXT: shlq $7, %rsi
; CHECK-NEXT: addq %rcx, %rsi
; CHECK-NEXT: addq $1248, %rsi # imm = 0x4E0
; CHECK-NEXT: movq %r13, 0
; CHECK-NEXT: movq %rdi, %r15
; CHECK-NEXT: movl %edx, (%rdi)
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %edi, %edi
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: callq *%rax
; CHECK-NEXT: xorq $1, %r14
; CHECK-NEXT: cmpl $0, (%r14)
; CHECK-NEXT: je .LBB0_6
; CHECK-NEXT: # %bb.4: # %if.else
; CHECK-NEXT: movb $1, %al
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: je .LBB0_5
; CHECK-NEXT: .LBB0_6: # %bb19
; CHECK-NEXT: testb $1, %bl
; CHECK-NEXT: movq %r15, %rdi
; CHECK-NEXT: movabsq $87960930222080, %r15 # imm = 0x500000000000
; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
; CHECK-NEXT: jne .LBB0_8
; CHECK-NEXT: .LBB0_7: # %if.end69
; CHECK-NEXT: movl %r13d, 0
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %esi, %esi
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: xorl %r8d, %r8d
; CHECK-NEXT: callq *%rax
; CHECK-NEXT: xorq %r15, %r12
; CHECK-NEXT: movslq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 4-byte Folded Reload
; CHECK-NEXT: movzbl (%r12), %ecx
; CHECK-NEXT: movb %cl, 544(%rax)
; CHECK-NEXT: .LBB0_8: # %land.lhs.true56
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: popq %r12
; CHECK-NEXT: popq %r13
; CHECK-NEXT: popq %r14
; CHECK-NEXT: popq %r15
; CHECK-NEXT: popq %rbp
; CHECK-NEXT: .cfi_def_cfa %rsp, 8
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB0_5: # %bb
entry:
%i = load i32, ptr null, align 8
br i1 %cmp54, label %if.end69, label %if.else

if.else: ; preds = %entry
%shr18 = and i32 %sub.i, 1
%idxprom.i = zext i32 %shr18 to i64
%arrayidx.i = getelementptr %struct.BlockContext, ptr null, i64 0, i32 14, i64 %idxprom.i
%i1 = load i8, ptr %arrayidx.i, align 1
%conv.i = zext i8 %i1 to i32
%and.i = and i32 %conv.i, 1
%i2 = and i64 87960930222080, 1
%i3 = inttoptr i64 %i2 to ptr
%i4 = load i32, ptr %i3, align 4
%i5 = and i64 %idxprom, 1
%i6 = or i64 %i5, 17592186044416
%i7 = inttoptr i64 %i6 to ptr
%i8 = load i32, ptr %i7, align 4
%i9 = lshr i32 %bl, %sub.i
%i10 = and i32 %i9, 2
%i11 = or i32 %bl, %i10
%i12 = select i1 %cmp54, i32 %i8, i32 %i4
%add.i = or i32 %_msprop1966, %and.i
%idxprom4 = zext i32 %bl to i64
%idxprom24 = zext i32 %add.i to i64
%i13 = or i32 %i, 1
%i14 = zext i32 %i13 to i64
%.not2329 = icmp eq i32 %i11, 0
%i15 = select i1 %.not2329, i32 1, i32 %i12
%arrayidx25 = getelementptr %struct.CdfModeContext, ptr null, i64 0, i32 3, i64 %idxprom4, i64 %idxprom24
store i64 %i14, ptr null, align 8
store i32 %i15, ptr %t, align 4
%call53 = tail call i32 null(ptr null, ptr %arrayidx25, i64 0)
%i16 = xor i64 %idxprom, 1
%i17 = inttoptr i64 %i16 to ptr
%_msld1992 = load i32, ptr %i17, align 8
%i18 = icmp ne i32 %_msld1992, 0
%_msprop_icmp1993 = and i1 %i18, false
br i1 %_msprop_icmp1993, label %bb, label %bb19

bb: ; preds = %if.else
unreachable

bb19: ; preds = %if.else
br i1 %cmp54, label %land.lhs.true56, label %if.end69

land.lhs.true56: ; preds = %bb19
ret i32 0

if.end69: ; preds = %bb19, %entry
%bx8.011941201 = phi i32 [ %shr18, %bb19 ], [ undef, %entry ]
store i32 %i, ptr null, align 8
%call79 = tail call fastcc i32 null(ptr %t, i32 0, i32 0, i32 0, i32 0)
%idxprom666 = zext i32 %bl to i64
%i20 = xor i64 %idxprom666, 87960930222080
%idxprom675 = sext i32 %bx8.011941201 to i64
%arrayidx676 = getelementptr %struct.BlockContext, ptr null, i64 0, i32 14, i64 %idxprom675
%i21 = inttoptr i64 %i20 to ptr
%_msld1414 = load i8, ptr %i21, align 1
store i8 %_msld1414, ptr %arrayidx676, align 1
ret i32 0
}

attributes #0 = { "frame-pointer"="all" "target-cpu"="x86-64" }