[AArch64][ABI] Pass v8f32 on the stack

[vfdff]

No definition of calling convention for 256bit vector types

Fixes #69694

[llvmbot]

@llvm/pr-subscribers-backend-aarch64

Author: Allen (vfdff)

Changes

No definition of calling convention for 256bit vector types

Fixes #69694

---

Full diff: https://github.com/llvm/llvm-project/pull/69729.diff

2 Files Affected:

• (modified) llvm/lib/Target/AArch64/AArch64CallingConvention.td (+4-1)
• (added) llvm/test/CodeGen/AArch64/aarch64-vector-pcs.ll (+9)

diff --git a/llvm/lib/Target/AArch64/AArch64CallingConvention.td b/llvm/lib/Target/AArch64/AArch64CallingConvention.td
index 117c9cad3916f52..bfb4c2c185d6823 100644
--- a/llvm/lib/Target/AArch64/AArch64CallingConvention.td
+++ b/llvm/lib/Target/AArch64/AArch64CallingConvention.td
@@ -108,7 +108,10 @@ defvar AArch64_Common = [
   CCIfType<[i64, f64, v1f64, v2f32, v1i64, v2i32, v4i16, v8i8, v4f16, v4bf16],
            CCAssignToStack<8, 8>>,
   CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16, v8bf16],
-           CCAssignToStack<16, 16>>
+           CCAssignToStack<16, 16>>,
+  // TODO: Add more vector types
+  CCIfType<[v8f32],
+           CCAssignToStack<32, 16>>
 ];
 
 let Entry = 1 in
diff --git a/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.ll b/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.ll
new file mode 100644
index 000000000000000..9ea8649a5a985f7
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.ll
@@ -0,0 +1,9 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64 -mattr=+sve -o - %s | FileCheck %s
+
+define fastcc void @inline_foo(<8 x float> %val)  vscale_range(2,2) {
+; CHECK-LABEL: inline_foo:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ret
+  ret void
+}

[aemerson]

This looks weird. How come this hasn't been hit before?

[vfdff]

This looks weird. How come this hasn't been hit before?

I think this may be related to the data type width, where the data type v8f32 is a 256-bit fixed-point vector type, and we rarely use such data types directly as parameters or return values. Generally, the width of the fixed-point vector data type is 128 bits, which can be placed in the V register on AArch64.

[vfdff]

hi @kawashima-fj @paulwalker-arm , I checked the PR70034 doesn't fix this issue, so maybe this change is still need ?

[kawashima-fj]

@vfdff I fixed in #70034 (will be merged soon) not to create v8f32 in the ArgumentPromotion pass. If v8f32 is created in another place, #70034 does not fix anything.

[vfdff]

@vfdff I fixed in #70034 (will be merged soon) not to create v8f32 in the ArgumentPromotion pass. If v8f32 is created in another place, #70034 does not fix anything.

Thanks for your explaination, I try to check this because PR74395

[vfdff]

Fixed by #70847