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[RISCV][GISel] Minor refactoring of RISCVCallReturnHandler and RISCVIncomingValueHandler to match other targets #69757

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Merged
merged 1 commit into from
Oct 20, 2023
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[RISCV][GISel] Minor refactoring of RISCVCallReturnHandler and RISCVIncomingValueHandler to match other targets #69757

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31 changes: 21 additions & 10 deletions llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -164,28 +164,39 @@ struct RISCVIncomingValueHandler : public CallLowering::IncomingValueHandler {

void assignValueToReg(Register ValVReg, Register PhysReg,
CCValAssign VA) override {
// Copy argument received in physical register to desired VReg.
MIRBuilder.getMBB().addLiveIn(PhysReg);
MIRBuilder.buildCopy(ValVReg, PhysReg);
markPhysRegUsed(PhysReg);
IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA);
}

/// How the physical register gets marked varies between formal
/// parameters (it's a basic-block live-in), and a call instruction
/// (it's an implicit-def of the BL).
virtual void markPhysRegUsed(MCRegister PhysReg) = 0;

private:
const RISCVSubtarget &Subtarget;
};

struct RISCVFormalArgHandler : public RISCVIncomingValueHandler {
RISCVFormalArgHandler(MachineIRBuilder &B, MachineRegisterInfo &MRI)
: RISCVIncomingValueHandler(B, MRI) {}

void markPhysRegUsed(MCRegister PhysReg) override {
MIRBuilder.getMRI()->addLiveIn(PhysReg);
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The switch to RISCVFormatArgHandler isn't quite nfc due to the addition of the getMRI()->getLiveIn line.

Not objecting, just making sure you're aware of it and it wasn't accidental.

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Thanks. I'll put that in the commit. I copied it from one of the other targets.

MIRBuilder.getMBB().addLiveIn(PhysReg);
}
};

struct RISCVCallReturnHandler : public RISCVIncomingValueHandler {
RISCVCallReturnHandler(MachineIRBuilder &B, MachineRegisterInfo &MRI,
MachineInstrBuilder &MIB)
: RISCVIncomingValueHandler(B, MRI), MIB(MIB) {}

MachineInstrBuilder MIB;

void assignValueToReg(Register ValVReg, Register PhysReg,
CCValAssign VA) override {
// Copy argument received in physical register to desired VReg.
void markPhysRegUsed(MCRegister PhysReg) override {
MIB.addDef(PhysReg, RegState::Implicit);
MIRBuilder.buildCopy(ValVReg, PhysReg);
}

MachineInstrBuilder MIB;
};

} // namespace
Expand Down Expand Up @@ -312,7 +323,7 @@ bool RISCVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
RISCVIncomingValueAssigner Assigner(
CC == CallingConv::Fast ? RISCV::CC_RISCV_FastCC : RISCV::CC_RISCV,
/*IsRet=*/false);
RISCVIncomingValueHandler Handler(MIRBuilder, MF.getRegInfo());
RISCVFormalArgHandler Handler(MIRBuilder, MF.getRegInfo());

return determineAndHandleAssignments(Handler, Assigner, SplitArgInfos,
MIRBuilder, CC, F.isVarArg());
Expand Down