Skip to content

[PowerPC] Forbid f128 SELECT_CC optimized into fsel #71497

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Nov 15, 2023
Merged

[PowerPC] Forbid f128 SELECT_CC optimized into fsel #71497

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 2 additions & 1 deletion llvm/lib/Target/PowerPC/PPCISelLowering.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -8080,7 +8080,8 @@ SDValue PPCTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
// For more information, see section F.3 of the 2.06 ISA specification.
// With ISA 3.0
if ((!DAG.getTarget().Options.NoInfsFPMath && !Flags.hasNoInfs()) ||
(!DAG.getTarget().Options.NoNaNsFPMath && !Flags.hasNoNaNs()))
(!DAG.getTarget().Options.NoNaNsFPMath && !Flags.hasNoNaNs()) ||
ResVT == MVT::f128)
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

does that mean fsel also does not support ppc_fp128?

Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

yes, we don't have instruction for ppc_fp128 fsel. The motivating case exists from 097a95f , which sets select_cc f128 as custom, while we don't have that lowering for ppc_fp128.

Copy link
Collaborator

@chenzheng1030 chenzheng1030 Nov 14, 2023 •
edited
Loading

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

But 097a95f will not try to custom SELECT_CC to fsel for ppc_fp128, right? That commit is only for ieee long double.
Do we have other pattern that will generate fsel operating on ppc_fp128 type?

Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

No. PPCISD::FSEL is only generated in LowerSELECT_CC, while SELECT_CC ppc_fp128 is expand.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Thank-you!

return Op;

// If the RHS of the comparison is a 0.0, we don't need to do the
Expand Down
17 changes: 17 additions & 0 deletions llvm/test/CodeGen/PowerPC/scalar-min-max-p10.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -70,3 +70,20 @@ entry:
%0 = tail call fast fp128 @llvm.minnum.f128(fp128 %a, fp128 %b)
ret fp128 %0
}

define fp128 @olt_sel(fp128 %a, fp128 %b) {
; CHECK-LABEL: olt_sel:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: plxv vs36, .LCPI6_0@PCREL(0), 1
; CHECK-NEXT: xscmpuqp cr0, v2, v4
; CHECK-NEXT: blt cr0, .LBB6_2
; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: vmr v3, v4
; CHECK-NEXT: .LBB6_2: # %entry
; CHECK-NEXT: vmr v2, v3
; CHECK-NEXT: blr
entry:
%0 = fcmp fast olt fp128 %a, 0xL00000000000000000000000000000000
%1 = select i1 %0, fp128 %b, fp128 0xL00000000000000000000000000000000
ret fp128 %1
}