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[mlir][sparse][gpu] cleanup GPUDataTransferStrategy #71615

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Merged
merged 4 commits into from
Nov 8, 2023
Merged

[mlir][sparse][gpu] cleanup GPUDataTransferStrategy #71615

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26db6b6
[mlir][sparse][gpu] cleanup GPUDataTransferStrategy
aartbik Nov 8, 2023
bf99004
typo
aartbik Nov 8, 2023
a629fa5
removed flag
aartbik Nov 8, 2023
d7e24e5
clang-format
aartbik Nov 8, 2023
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20 changes: 2 additions & 18 deletions mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
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Original file line number Diff line number Diff line change
Expand Up @@ -52,21 +52,6 @@ struct SparseCompilerOptions
mlir::SparseParallelizationStrategy::kAnyStorageAnyLoop,
"any-storage-any-loop",
"Enable sparse parallelization for any storage and loop."))};
PassOptions::Option<mlir::GPUDataTransferStrategy> gpuDataTransfer{
*this, "gpu-data-transfer-strategy",
::llvm::cl::desc(
"Set the data transfer strategy between the host and the GPUs"),
::llvm::cl::init(mlir::GPUDataTransferStrategy::kRegularDMA),
llvm::cl::values(
clEnumValN(mlir::GPUDataTransferStrategy::kRegularDMA, "regular-dma",
"Default option: malloc on host without additional "
"options or care and then use DMA to copy the data"),
clEnumValN(mlir::GPUDataTransferStrategy::kPinnedDMA, "pinned-dma",
"Based on the default option, pin the host memory to "
"accelerate the data transfer"),
clEnumValN(mlir::GPUDataTransferStrategy::kZeroCopy, "zero-copy",
"Use zero-copy to perform the data transfer from the host "
"to the GPU"))};

PassOptions::Option<bool> enableIndexReduction{
*this, "enable-index-reduction",
Expand Down Expand Up @@ -166,9 +151,8 @@ struct SparseCompilerOptions

/// Projects out the options for `createSparsificationPass`.
SparsificationOptions sparsificationOptions() const {
return SparsificationOptions(parallelization, gpuDataTransfer,
enableIndexReduction, enableGPULibgen,
enableRuntimeLibrary);
return SparsificationOptions(parallelization, enableIndexReduction,
enableGPULibgen, enableRuntimeLibrary);
}

/// Projects out the options for `createConvertVectorToLLVMPass`.
Expand Down
20 changes: 6 additions & 14 deletions mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h
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Expand Up @@ -47,10 +47,6 @@ enum class ReinterpretMapScope {
kExceptGeneric, // reinterprets operation other than linalg.generic
};

/// Defines data movement strategy between host and device for GPU.
// TODO : Zero copy is disabled due to correctness bugs (tracker #64316)
enum class GPUDataTransferStrategy { kRegularDMA, kZeroCopy, kPinnedDMA };

#define GEN_PASS_DECL
#include "mlir/Dialect/SparseTensor/Transforms/Passes.h.inc"

Expand Down Expand Up @@ -78,18 +74,14 @@ std::unique_ptr<Pass> createPreSparsificationRewritePass();

/// Options for the Sparsification pass.
struct SparsificationOptions {
SparsificationOptions(SparseParallelizationStrategy p,
GPUDataTransferStrategy t, bool idxReduc,
SparsificationOptions(SparseParallelizationStrategy p, bool idxReduc,
bool gpuLibgen, bool enableRT)
: parallelizationStrategy(p), gpuDataTransferStrategy(t),
enableIndexReduction(idxReduc), enableGPULibgen(gpuLibgen),
enableRuntimeLibrary(enableRT) {}
: parallelizationStrategy(p), enableIndexReduction(idxReduc),
enableGPULibgen(gpuLibgen), enableRuntimeLibrary(enableRT) {}
SparsificationOptions()
: SparsificationOptions(SparseParallelizationStrategy::kNone,
GPUDataTransferStrategy::kRegularDMA, false,
: SparsificationOptions(SparseParallelizationStrategy::kNone, false,
false, true) {}
SparseParallelizationStrategy parallelizationStrategy;
GPUDataTransferStrategy gpuDataTransferStrategy;
bool enableIndexReduction;
bool enableGPULibgen;
bool enableRuntimeLibrary;
Expand Down Expand Up @@ -201,8 +193,8 @@ std::unique_ptr<Pass> createSparseVectorizationPass(unsigned vectorLength,
void populateSparseGPUCodegenPatterns(RewritePatternSet &patterns,
unsigned numThreads);

void populateSparseGPULibgenPatterns(RewritePatternSet &patterns, bool enableRT,
GPUDataTransferStrategy gpuDataTransfer);
void populateSparseGPULibgenPatterns(RewritePatternSet &patterns,
bool enableRT);

std::unique_ptr<Pass> createSparseGPUCodegenPass();
std::unique_ptr<Pass> createSparseGPUCodegenPass(unsigned numThreads);
Expand Down
13 changes: 0 additions & 13 deletions mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
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Expand Up @@ -134,19 +134,6 @@ def SparsificationPass : Pass<"sparsification", "ModuleOp"> {
clEnumValN(mlir::SparseParallelizationStrategy::kAnyStorageAnyLoop,
"any-storage-any-loop",
"Enable sparse parallelization for any storage and loop."))}]>,
Option<"gpuDataTransfer", "gpu-data-transfer-strategy", "mlir::GPUDataTransferStrategy",
"mlir::GPUDataTransferStrategy::kRegularDMA",
"Set the data transfer strategy", [{llvm::cl::values(
clEnumValN(mlir::GPUDataTransferStrategy::kRegularDMA,
"regular-dma",
"Default option: malloc on host without additional "
"options or care and then use DMA to copy the data"),
clEnumValN(mlir::GPUDataTransferStrategy::kPinnedDMA, "pinned-dma",
"Based on the default option, pin the host memory to "
"accelerate the data transfer"),
clEnumValN(mlir::GPUDataTransferStrategy::kZeroCopy, "zero-copy",
"Use zero-copy to perform the data transfer from the host "
"to the GPU"))}]>,
Option<"enableGPULibgen", "enable-gpu-libgen", "bool",
"false",
"Enable GPU acceleration by means of direct library calls (like cuSPARSE)">,
Expand Down
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