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[VectorCombine] Fix crash in scalarizeVPIntrinsic #72039

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Merged
merged 3 commits into from
Nov 12, 2023
Merged

[VectorCombine] Fix crash in scalarizeVPIntrinsic #72039

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ea60770
[VectorCombine] Fix crash in scalarizeVPIntrinsic
michaelmaitland Nov 11, 2023
2965b55
move getSplatValue check earlier in the function
michaelmaitland Nov 12, 2023
81910b2
fix check-prefix option
michaelmaitland Nov 12, 2023
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9 changes: 7 additions & 2 deletions llvm/lib/Transforms/Vectorize/VectorCombine.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -753,6 +753,13 @@ bool VectorCombine::scalarizeVPIntrinsic(Instruction &I) {
if (!isSplatValue(Op0) || !isSplatValue(Op1))
return false;

// Check getSplatValue early in this function, to avoid doing unnecessary
// work.
Value *ScalarOp0 = getSplatValue(Op0);
Value *ScalarOp1 = getSplatValue(Op1);
if (!ScalarOp0 || !ScalarOp1)
return false;

// For the binary VP intrinsics supported here, the result on disabled lanes
// is a poison value. For now, only do this simplification if all lanes
// are active.
Expand Down Expand Up @@ -841,8 +848,6 @@ bool VectorCombine::scalarizeVPIntrinsic(Instruction &I) {
if (!SafeToSpeculate && !isKnownNonZero(EVL, DL, 0, &AC, &VPI, &DT))
return false;

Value *ScalarOp0 = getSplatValue(Op0);
Value *ScalarOp1 = getSplatValue(Op1);
Value *ScalarVal =
ScalarIntrID
? Builder.CreateIntrinsic(VecTy->getScalarType(), *ScalarIntrID,
Expand Down
16 changes: 16 additions & 0 deletions llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization-shufflevector-splat.ll
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@@ -0,0 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
; RUN: opt -S -mtriple=riscv64 -mattr=+v %s -passes=vector-combine | FileCheck %s --check-prefix=CHECK

declare <4 x i64> @llvm.vp.add.v4i64(<4 x i64>, <4 x i64>, <4 x i1>, i32)

define <4 x i64> @add_v4i64_allonesmask(<4 x i64> %x) {
; CHECK-LABEL: define <4 x i64> @add_v4i64_allonesmask(
; CHECK-SAME: <4 x i64> [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i64> [[X]], <4 x i64> zeroinitializer, <4 x i32> zeroinitializer
; CHECK-NEXT: [[TMP2:%.*]] = call <4 x i64> @llvm.vp.add.v4i64(<4 x i64> [[TMP1]], <4 x i64> zeroinitializer, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, i32 0)
; CHECK-NEXT: ret <4 x i64> [[TMP2]]
;
%1 = shufflevector <4 x i64> %x, <4 x i64> zeroinitializer, <4 x i32> zeroinitializer
%2 = call <4 x i64> @llvm.vp.add.v4i64(<4 x i64> %1, <4 x i64> zeroinitializer, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, i32 0)
ret <4 x i64> %2
}