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[RISCV] Omit "@plt" in assembly output "call foo@plt" #72467

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Merged
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Jan 7, 2024
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[RISCV] Omit "@plt" in assembly output "call foo@plt" #72467

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5 changes: 2 additions & 3 deletions llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
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Expand Up @@ -2035,9 +2035,8 @@ ParseStatus RISCVAsmParser::parseCallSymbol(OperandVector &Operands) {

SMLoc E = SMLoc::getFromPointer(S.getPointer() + Identifier.size());

RISCVMCExpr::VariantKind Kind = RISCVMCExpr::VK_RISCV_CALL;
if (Identifier.consume_back("@plt"))
Kind = RISCVMCExpr::VK_RISCV_CALL_PLT;
RISCVMCExpr::VariantKind Kind = RISCVMCExpr::VK_RISCV_CALL_PLT;
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We should be able to ditch VK_RISCV_CALL_PLT and only have a VK_RISCV_CALL that means @plt

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Should we ditch VK_RISCV_CALL and only have a VK_RISCV_CALL_PLT? The ABI decided to keep R_RISCV_CALL_PLT not R_RISCV_CALL. It may be more clear to be analogous to the ABI and since we want to always emit the @plt suffix.

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We should be able to ditch VK_RISCV_CALL_PLT and only have a VK_RISCV_CALL that means @plt

This patch will make this possible. I am happy to remove either one as a follow-up (which will update very few tests).

(void)Identifier.consume_back("@plt");

MCSymbol *Sym = getContext().getOrCreateSymbol(Identifier);
Res = MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_None, getContext());
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2 changes: 0 additions & 2 deletions llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
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Expand Up @@ -41,8 +41,6 @@ void RISCVMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
if (HasVariant)
OS << '%' << getVariantKindName(getKind()) << '(';
Expr->print(OS, MAI);
if (Kind == VK_RISCV_CALL_PLT)
OS << "@plt";
if (HasVariant)
OS << ')';
}
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24 changes: 12 additions & 12 deletions llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
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Expand Up @@ -167,7 +167,7 @@ define i32 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; RV32-NEXT: andi a0, a0, -16
; RV32-NEXT: sub a0, sp, a0
; RV32-NEXT: mv sp, a0
; RV32-NEXT: call notdead@plt
; RV32-NEXT: call notdead
; RV32-NEXT: mv a0, s1
; RV32-NEXT: addi sp, s0, -16
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Expand Down Expand Up @@ -204,7 +204,7 @@ define i32 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; RV64-NEXT: andi a0, a0, -16
; RV64-NEXT: sub a0, sp, a0
; RV64-NEXT: mv sp, a0
; RV64-NEXT: call notdead@plt
; RV64-NEXT: call notdead
; RV64-NEXT: mv a0, s1
; RV64-NEXT: addi sp, s0, -32
; RV64-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
Expand All @@ -229,7 +229,7 @@ define void @va1_caller() nounwind {
; RV32-NEXT: lui a3, 261888
; RV32-NEXT: li a4, 2
; RV32-NEXT: li a2, 0
; RV32-NEXT: call va1@plt
; RV32-NEXT: call va1
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret
Expand All @@ -241,7 +241,7 @@ define void @va1_caller() nounwind {
; LP64-NEXT: lui a0, %hi(.LCPI3_0)
; LP64-NEXT: ld a1, %lo(.LCPI3_0)(a0)
; LP64-NEXT: li a2, 2
; LP64-NEXT: call va1@plt
; LP64-NEXT: call va1
; LP64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; LP64-NEXT: addi sp, sp, 16
; LP64-NEXT: ret
Expand All @@ -255,7 +255,7 @@ define void @va1_caller() nounwind {
; LP64F-NEXT: fmv.d.x fa5, a0
; LP64F-NEXT: li a2, 2
; LP64F-NEXT: fmv.x.d a1, fa5
; LP64F-NEXT: call va1@plt
; LP64F-NEXT: call va1
; LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; LP64F-NEXT: addi sp, sp, 16
; LP64F-NEXT: ret
Expand All @@ -269,7 +269,7 @@ define void @va1_caller() nounwind {
; LP64D-NEXT: fmv.d.x fa5, a0
; LP64D-NEXT: li a2, 2
; LP64D-NEXT: fmv.x.d a1, fa5
; LP64D-NEXT: call va1@plt
; LP64D-NEXT: call va1
; LP64D-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; LP64D-NEXT: addi sp, sp, 16
; LP64D-NEXT: ret
Expand Down Expand Up @@ -473,7 +473,7 @@ define void @va2_caller() nounwind {
; RV32-NEXT: addi sp, sp, -16
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32-NEXT: li a1, 1
; RV32-NEXT: call va2@plt
; RV32-NEXT: call va2
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret
Expand All @@ -483,7 +483,7 @@ define void @va2_caller() nounwind {
; RV64-NEXT: addi sp, sp, -16
; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64-NEXT: li a1, 1
; RV64-NEXT: call va2@plt
; RV64-NEXT: call va2
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 16
; RV64-NEXT: ret
Expand Down Expand Up @@ -701,7 +701,7 @@ define void @va3_caller() nounwind {
; RV32-NEXT: li a0, 2
; RV32-NEXT: li a1, 1111
; RV32-NEXT: li a2, 0
; RV32-NEXT: call va3@plt
; RV32-NEXT: call va3
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret
Expand All @@ -714,7 +714,7 @@ define void @va3_caller() nounwind {
; RV64-NEXT: addiw a2, a0, -480
; RV64-NEXT: li a0, 2
; RV64-NEXT: li a1, 1111
; RV64-NEXT: call va3@plt
; RV64-NEXT: call va3
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 16
; RV64-NEXT: ret
Expand Down Expand Up @@ -749,7 +749,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
; RV32-NEXT: lw s0, 0(a0)
; RV32-NEXT: sw a2, 0(a1)
; RV32-NEXT: lw a0, 0(sp)
; RV32-NEXT: call notdead@plt
; RV32-NEXT: call notdead
; RV32-NEXT: lw a0, 4(sp)
; RV32-NEXT: addi a0, a0, 3
; RV32-NEXT: andi a0, a0, -4
Expand Down Expand Up @@ -803,7 +803,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
; RV64-NEXT: lwu a1, 0(sp)
; RV64-NEXT: slli a0, a0, 32
; RV64-NEXT: or a0, a0, a1
; RV64-NEXT: call notdead@plt
; RV64-NEXT: call notdead
; RV64-NEXT: ld a0, 8(sp)
; RV64-NEXT: addi a0, a0, 3
; RV64-NEXT: andi a0, a0, -4
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/RISCV/addrspacecast.ll
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Expand Up @@ -26,7 +26,7 @@ define void @cast1(ptr %ptr) {
; RV32I-NEXT: .cfi_def_cfa_offset 16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: .cfi_offset ra, -4
; RV32I-NEXT: call foo@plt
; RV32I-NEXT: call foo
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
Expand All @@ -37,7 +37,7 @@ define void @cast1(ptr %ptr) {
; RV64I-NEXT: .cfi_def_cfa_offset 16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: call foo@plt
; RV64I-NEXT: call foo
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/RISCV/aext-to-sext.ll
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Expand Up @@ -19,7 +19,7 @@ define void @quux(i32 signext %arg, i32 signext %arg1) nounwind {
; RV64I-NEXT: subw s0, a1, a0
; RV64I-NEXT: .LBB0_2: # %bb2
; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
; RV64I-NEXT: call hoge@plt
; RV64I-NEXT: call hoge
; RV64I-NEXT: addiw s0, s0, -1
; RV64I-NEXT: bnez s0, .LBB0_2
; RV64I-NEXT: # %bb.3:
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/RISCV/alloca.ll
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Expand Up @@ -18,7 +18,7 @@ define void @simple_alloca(i32 %n) nounwind {
; RV32I-NEXT: andi a0, a0, -16
; RV32I-NEXT: sub a0, sp, a0
; RV32I-NEXT: mv sp, a0
; RV32I-NEXT: call notdead@plt
; RV32I-NEXT: call notdead
; RV32I-NEXT: addi sp, s0, -16
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
Expand All @@ -45,7 +45,7 @@ define void @scoped_alloca(i32 %n) nounwind {
; RV32I-NEXT: andi a0, a0, -16
; RV32I-NEXT: sub a0, sp, a0
; RV32I-NEXT: mv sp, a0
; RV32I-NEXT: call notdead@plt
; RV32I-NEXT: call notdead
; RV32I-NEXT: mv sp, s1
; RV32I-NEXT: addi sp, s0, -16
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Expand Down Expand Up @@ -91,7 +91,7 @@ define void @alloca_callframe(i32 %n) nounwind {
; RV32I-NEXT: li a6, 7
; RV32I-NEXT: li a7, 8
; RV32I-NEXT: sw t0, 0(sp)
; RV32I-NEXT: call func@plt
; RV32I-NEXT: call func
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: addi sp, s0, -16
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/RISCV/analyze-branch.ll
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Expand Up @@ -20,13 +20,13 @@ define void @test_bcc_fallthrough_taken(i32 %in) nounwind {
; RV32I-NEXT: li a1, 42
; RV32I-NEXT: bne a0, a1, .LBB0_3
; RV32I-NEXT: # %bb.1: # %true
; RV32I-NEXT: call test_true@plt
; RV32I-NEXT: call test_true
; RV32I-NEXT: .LBB0_2: # %true
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
; RV32I-NEXT: .LBB0_3: # %false
; RV32I-NEXT: call test_false@plt
; RV32I-NEXT: call test_false
; RV32I-NEXT: j .LBB0_2
%tst = icmp eq i32 %in, 42
br i1 %tst, label %true, label %false, !prof !0
Expand All @@ -52,13 +52,13 @@ define void @test_bcc_fallthrough_nottaken(i32 %in) nounwind {
; RV32I-NEXT: li a1, 42
; RV32I-NEXT: beq a0, a1, .LBB1_3
; RV32I-NEXT: # %bb.1: # %false
; RV32I-NEXT: call test_false@plt
; RV32I-NEXT: call test_false
; RV32I-NEXT: .LBB1_2: # %true
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
; RV32I-NEXT: .LBB1_3: # %true
; RV32I-NEXT: call test_true@plt
; RV32I-NEXT: call test_true
; RV32I-NEXT: j .LBB1_2
%tst = icmp eq i32 %in, 42
br i1 %tst, label %true, label %false, !prof !1
Expand Down
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