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[AArch64] Add missing bf16 store pattern #72844

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Merged
merged 1 commit into from
Nov 20, 2023
Merged

[AArch64] Add missing bf16 store pattern #72844

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5 changes: 5 additions & 0 deletions llvm/lib/Target/AArch64/AArch64InstrInfo.td
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Original file line number Diff line number Diff line change
Expand Up @@ -3926,6 +3926,11 @@ defm STURBB : StoreUnscaled<0b00, 0, 0b00, GPR32z, "sturb",
[(truncstorei8 GPR32z:$Rt,
(am_unscaled8 GPR64sp:$Rn, simm9:$offset))]>;

// bf16 store pattern
def : Pat<(store (bf16 FPR16Op:$Rt),
(am_unscaled16 GPR64sp:$Rn, simm9:$offset)),
(STURHi FPR16:$Rt, GPR64sp:$Rn, simm9:$offset)>;

// Armv8.4 Weaker Release Consistency enhancements
// LDAPR & STLR with Immediate Offset instructions
let Predicates = [HasRCPC_IMMO] in {
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10 changes: 10 additions & 0 deletions llvm/test/CodeGen/AArch64/bf16.ll
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Expand Up @@ -45,6 +45,16 @@ define void @test_store(ptr %a, bfloat %b) nounwind {
ret void
}

define void @test_store_negative_offset(ptr %a, bfloat %b) nounwind {
; CHECK-LABEL: test_store_negative_offset:
; CHECK-NEXT: stur h0, [x0, #-4]
; CHECK-NEXT: ret
entry:
%0 = getelementptr inbounds bfloat, ptr %a, i64 -2
store bfloat %b, ptr %0, align 2
ret void
}

; Simple store of v4bf16
define void @test_vec_store(ptr %a, <4 x bfloat> %b) nounwind {
; CHECK-LABEL: test_vec_store:
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