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[RISCV] Fix the order of arguments of setTruncStoreAction and setLoadExtAction #73090

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Merged
merged 1 commit into from
Nov 22, 2023
Merged

[RISCV] Fix the order of arguments of setTruncStoreAction and setLoadExtAction #73090

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14 changes: 7 additions & 7 deletions llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -751,9 +751,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
// Expand all extending loads to types larger than this, and truncating
// stores from types larger than this.
for (MVT OtherVT : MVT::integer_scalable_vector_valuetypes()) {
setTruncStoreAction(OtherVT, VT, Expand);
setLoadExtAction({ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}, OtherVT,
VT, Expand);
setTruncStoreAction(VT, OtherVT, Expand);
setLoadExtAction({ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}, VT,
OtherVT, Expand);
}

setOperationAction({ISD::VP_FP_TO_SINT, ISD::VP_FP_TO_UINT,
Expand Down Expand Up @@ -843,8 +843,8 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,

for (MVT OtherVT : MVT::integer_scalable_vector_valuetypes()) {
setTruncStoreAction(VT, OtherVT, Expand);
setLoadExtAction({ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}, OtherVT,
VT, Expand);
setLoadExtAction({ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}, VT,
OtherVT, Expand);
}

setOperationAction(ISD::VECTOR_DEINTERLEAVE, VT, Custom);
Expand Down Expand Up @@ -1074,8 +1074,8 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
setOperationAction(Op, VT, Expand);
for (MVT OtherVT : MVT::integer_fixedlen_vector_valuetypes()) {
setTruncStoreAction(VT, OtherVT, Expand);
setLoadExtAction({ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD},
OtherVT, VT, Expand);
setLoadExtAction({ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}, VT,
OtherVT, Expand);
}

// Custom lower fixed vector undefs to scalable vector undefs to avoid
Expand Down