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[mlir][sparse] fix uninitialized dense tensor out in conv2d test #74884

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Merged
merged 1 commit into from
Dec 8, 2023

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aartbik
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@aartbik aartbik commented Dec 8, 2023

Note, tensor.empty may feed into SPARSE output (meaning it truly has no values yet), but for a DENSE output, it should always have an initial value. We ran a verifier over all our tests and this is the only remaining omission.

Note, tensor.empty may feed into SPARSE output (meaning it truly has
no values yet), but for a DENSE output, it should always have an
initial value. We ran a verifier over all our tests and this is the
only remaining omission.
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llvmbot commented Dec 8, 2023

@llvm/pr-subscribers-mlir-sparse

@llvm/pr-subscribers-mlir

Author: Aart Bik (aartbik)

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Note, tensor.empty may feed into SPARSE output (meaning it truly has no values yet), but for a DENSE output, it should always have an initial value. We ran a verifier over all our tests and this is the only remaining omission.


Full diff: https://github.com/llvm/llvm-project/pull/74884.diff

1 Files Affected:

  • (modified) mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir (+8-8)
diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
index 4f5ceda261dac0..41071ea700fb60 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
@@ -55,15 +55,15 @@ module {
 
   func.func @conv2d_CSR_dense_rotated(%arg0: tensor<8x8xi32, #CSR>,
                                       %arg1: tensor<3x3xi32>) -> tensor<6x6xi32> {
-    %s = tensor.empty() : tensor<6x6xi32>
+    %s = arith.constant dense<0> : tensor<6x6xi32>
     %0 = linalg.generic {indexing_maps = [#map, #map1, #map2],
-    iterator_types = ["parallel", "reduction", "reduction", "parallel"]}
-    ins(%arg0, %arg1 : tensor<8x8xi32, #CSR>, tensor<3x3xi32>)
-    outs(%s : tensor<6x6xi32>) attrs =  {sorted = true} {
-    ^bb0(%in: i32, %in_0: i32, %out: i32):
-      %1 = arith.muli %in, %in_0 : i32
-      %2 = arith.addi %out, %1 : i32
-      linalg.yield %2 : i32
+      iterator_types = ["parallel", "reduction", "reduction", "parallel"]}
+      ins(%arg0, %arg1 : tensor<8x8xi32, #CSR>, tensor<3x3xi32>)
+      outs(%s : tensor<6x6xi32>) attrs =  {sorted = true} {
+      ^bb0(%in: i32, %in_0: i32, %out: i32):
+        %1 = arith.muli %in, %in_0 : i32
+        %2 = arith.addi %out, %1 : i32
+        linalg.yield %2 : i32
     } -> tensor<6x6xi32>
     return %0 : tensor<6x6xi32>
   }

@aartbik aartbik merged commit 21213f3 into llvm:main Dec 8, 2023
@aartbik aartbik deleted the bik branch December 8, 2023 20:45
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3 participants