Skip to content

[MemCpyOpt] Don't perform call slot opt if alloc type is scalable #75027

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Dec 11, 2023
Merged

[MemCpyOpt] Don't perform call slot opt if alloc type is scalable #75027

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
7 changes: 5 additions & 2 deletions llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -880,8 +880,11 @@ bool MemCpyOptPass::performCallSlotOptzn(Instruction *cpyLoad,
return false;

const DataLayout &DL = cpyLoad->getModule()->getDataLayout();
uint64_t srcSize = DL.getTypeAllocSize(srcAlloca->getAllocatedType()) *
srcArraySize->getZExtValue();
TypeSize SrcAllocaSize = DL.getTypeAllocSize(srcAlloca->getAllocatedType());
// We can't optimize scalable types.
if (SrcAllocaSize.isScalable())
return false;
uint64_t srcSize = SrcAllocaSize * srcArraySize->getZExtValue();

if (cpySize < srcSize)
return false;
Expand Down
19 changes: 19 additions & 0 deletions llvm/test/Transforms/MemCpyOpt/pr75010.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=memcpyopt < %s | FileCheck %s

define void @f(ptr nocapture noundef writeonly %r, <vscale x 2 x i32> %x) {
; CHECK-LABEL: @f(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X_ADDR:%.*]] = alloca <vscale x 2 x i32>, align 8
; CHECK-NEXT: store <vscale x 2 x i32> [[X:%.*]], ptr [[X_ADDR]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[X_ADDR]], align 8
; CHECK-NEXT: store i64 [[TMP0]], ptr [[R:%.*]], align 1
; CHECK-NEXT: ret void
;
entry:
%x.addr = alloca <vscale x 2 x i32>, align 8
store <vscale x 2 x i32> %x, ptr %x.addr, align 8
%0 = load i64, ptr %x.addr, align 8
store i64 %0, ptr %r, align 1
ret void
}