[AMDGPU] Miscellaneous clang-format changes

[jayfoad]

Reformat one table and protect a couple of tables that we don't want to
reformat.

[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

Author: Jay Foad (jayfoad)

Changes

Reformat one table and protect a couple of tables that we don't want to
reformat.

---

Full diff: https://github.com/llvm/llvm-project/pull/75186.diff

3 Files Affected:

• (modified) llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h (+2)
• (modified) llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp (+17-19)
• (modified) llvm/lib/Target/AMDGPU/SIDefines.h (+3)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
index ee21fe1615be4a..42b33c50d9f8c4 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
@@ -98,6 +98,7 @@ struct KernArgPreloadDescriptor : public ArgDescriptor {
 };
 
 struct AMDGPUFunctionArgInfo {
+  // clang-format off
   enum PreloadedValue {
     // SGPRS:
     PRIVATE_SEGMENT_BUFFER = 0,
@@ -120,6 +121,7 @@ struct AMDGPUFunctionArgInfo {
     WORKITEM_ID_Z       = 19,
     FIRST_VGPR_VALUE    = WORKITEM_ID_X
   };
+  // clang-format on
 
   // Kernel input registers setup for the HSA ABI in allocation order.
 
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp b/llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
index e387e16d0cf15d..552380d54dfd09 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
@@ -89,25 +89,23 @@ const SubtargetSubTypeKV *getGPUInfo(const GCNSubtarget &ST,
   return nullptr;
 }
 
-constexpr unsigned FeaturesToCheck[] = {
-    AMDGPU::FeatureGFX11Insts,
-    AMDGPU::FeatureGFX10Insts,
-    AMDGPU::FeatureGFX9Insts,
-    AMDGPU::FeatureGFX8Insts,
-    AMDGPU::FeatureDPP,
-    AMDGPU::Feature16BitInsts,
-    AMDGPU::FeatureDot1Insts,
-    AMDGPU::FeatureDot2Insts,
-    AMDGPU::FeatureDot3Insts,
-    AMDGPU::FeatureDot4Insts,
-    AMDGPU::FeatureDot5Insts,
-    AMDGPU::FeatureDot6Insts,
-    AMDGPU::FeatureDot7Insts,
-    AMDGPU::FeatureDot8Insts,
-    AMDGPU::FeatureExtendedImageInsts,
-    AMDGPU::FeatureSMemRealTime,
-    AMDGPU::FeatureSMemTimeInst
-};
+constexpr unsigned FeaturesToCheck[] = {AMDGPU::FeatureGFX11Insts,
+                                        AMDGPU::FeatureGFX10Insts,
+                                        AMDGPU::FeatureGFX9Insts,
+                                        AMDGPU::FeatureGFX8Insts,
+                                        AMDGPU::FeatureDPP,
+                                        AMDGPU::Feature16BitInsts,
+                                        AMDGPU::FeatureDot1Insts,
+                                        AMDGPU::FeatureDot2Insts,
+                                        AMDGPU::FeatureDot3Insts,
+                                        AMDGPU::FeatureDot4Insts,
+                                        AMDGPU::FeatureDot5Insts,
+                                        AMDGPU::FeatureDot6Insts,
+                                        AMDGPU::FeatureDot7Insts,
+                                        AMDGPU::FeatureDot8Insts,
+                                        AMDGPU::FeatureExtendedImageInsts,
+                                        AMDGPU::FeatureSMemRealTime,
+                                        AMDGPU::FeatureSMemTimeInst};
 
 FeatureBitset expandImpliedFeatures(const FeatureBitset &Features) {
   FeatureBitset Result = Features;
diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index 29397e109706a0..9b2f52c1286e03 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -1026,6 +1026,8 @@ enum Register_Flag : uint8_t {
 
 } // namespace AMDGPU
 
+// clang-format off
+
 #define R_00B028_SPI_SHADER_PGM_RSRC1_PS                                0x00B028
 #define   S_00B028_VGPRS(x)                                           (((x) & 0x3F) << 0)
 #define   S_00B028_SGPRS(x)                                           (((x) & 0x0F) << 6)
@@ -1134,6 +1136,7 @@ enum Register_Flag : uint8_t {
 #define   G_00B848_FWD_PROGRESS(x)                                    (((x) >> 31) & 0x1)
 #define   C_00B848_FWD_PROGRESS                                       0x7FFFFFFF
 
+// clang-format on
 
 // Helpers for setting FLOAT_MODE
 #define FP_ROUND_ROUND_TO_NEAREST 0

[mariusz-sikora-at-amd]

LGTM

[piotrAMD]

LGTM, thanks.

[piotrAMD]

I have a similar patch for moveToVALU: #75188.