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[Clang][RISCV] Add missing support for __riscv_clmulr_32/64 in riscv_bitmanip.h #76289

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Merged
merged 2 commits into from
Dec 24, 2023
Merged

[Clang][RISCV] Add missing support for __riscv_clmulr_32/64 in riscv_bitmanip.h #76289

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bad9203
[Clang][RISCV] Add missing support for `__riscv_clmulr_32/64` in `ris…
dtcxzyw Dec 23, 2023
dee8caf
[Clang][RISCV] Use riscv_bitmanip.h in zbc.c. NFC.
dtcxzyw Dec 23, 2023
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20 changes: 18 additions & 2 deletions clang/lib/Headers/riscv_bitmanip.h
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Original file line number Diff line number Diff line change
Expand Up @@ -120,7 +120,23 @@ __riscv_zip_32(uint32_t __x) {
#endif
#endif // defined(__riscv_zbkb)

#if defined(__riscv_zbkc)
#if defined(__riscv_zbc)
#if __riscv_xlen == 32
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
__riscv_clmulr_32(uint32_t __x, uint32_t __y) {
return __builtin_riscv_clmulr_32(__x, __y);
}
#endif

#if __riscv_xlen == 64
static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
__riscv_clmulr_64(uint64_t __x, uint64_t __y) {
return __builtin_riscv_clmulr_64(__x, __y);
}
#endif
#endif // defined(__riscv_zbc)

#if defined(__riscv_zbkc) || defined(__riscv_zbc)
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
__riscv_clmul_32(uint32_t __x, uint32_t __y) {
return __builtin_riscv_clmul_32(__x, __y);
Expand All @@ -144,7 +160,7 @@ __riscv_clmulh_64(uint64_t __x, uint64_t __y) {
return __builtin_riscv_clmulh_64(__x, __y);
}
#endif
#endif // defined(__riscv_zbkc)
#endif // defined(__riscv_zbkc) || defined(__riscv_zbc)

#if defined(__riscv_zbkx)
#if __riscv_xlen == 32
Expand Down
14 changes: 7 additions & 7 deletions clang/test/CodeGen/RISCV/rvb-intrinsics/zbc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@
// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \
// RUN: | FileCheck %s -check-prefix=RV64ZBC

#include <stdint.h>
#include <riscv_bitmanip.h>

#if __riscv_xlen == 64
// RV64ZBC-LABEL: @clmul_64(
Expand All @@ -15,7 +15,7 @@
// RV64ZBC-NEXT: ret i64 [[TMP0]]
//
uint64_t clmul_64(uint64_t a, uint64_t b) {
return __builtin_riscv_clmul_64(a, b);
return __riscv_clmul_64(a, b);
}

// RV64ZBC-LABEL: @clmulh_64(
Expand All @@ -24,7 +24,7 @@ uint64_t clmul_64(uint64_t a, uint64_t b) {
// RV64ZBC-NEXT: ret i64 [[TMP0]]
//
uint64_t clmulh_64(uint64_t a, uint64_t b) {
return __builtin_riscv_clmulh_64(a, b);
return __riscv_clmulh_64(a, b);
}

// RV64ZBC-LABEL: @clmulr_64(
Expand All @@ -33,7 +33,7 @@ uint64_t clmulh_64(uint64_t a, uint64_t b) {
// RV64ZBC-NEXT: ret i64 [[TMP0]]
//
uint64_t clmulr_64(uint64_t a, uint64_t b) {
return __builtin_riscv_clmulr_64(a, b);
return __riscv_clmulr_64(a, b);
}
#endif

Expand All @@ -48,7 +48,7 @@ uint64_t clmulr_64(uint64_t a, uint64_t b) {
// RV64ZBC-NEXT: ret i32 [[TMP0]]
//
uint32_t clmul_32(uint32_t a, uint32_t b) {
return __builtin_riscv_clmul_32(a, b);
return __riscv_clmul_32(a, b);
}

#if __riscv_xlen == 32
Expand All @@ -58,7 +58,7 @@ uint32_t clmul_32(uint32_t a, uint32_t b) {
// RV32ZBC-NEXT: ret i32 [[TMP0]]
//
uint32_t clmulh_32(uint32_t a, uint32_t b) {
return __builtin_riscv_clmulh_32(a, b);
return __riscv_clmulh_32(a, b);
}

// RV32ZBC-LABEL: @clmulr_32(
Expand All @@ -67,6 +67,6 @@ uint32_t clmulh_32(uint32_t a, uint32_t b) {
// RV32ZBC-NEXT: ret i32 [[TMP0]]
//
uint32_t clmulr_32(uint32_t a, uint32_t b) {
return __builtin_riscv_clmulr_32(a, b);
return __riscv_clmulr_32(a, b);
}
#endif