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[InstSimplify] Simplify the expression (a^c)&(a^~c) to zero and (a^c) | (a^~c) to minus one. #76637

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Merged
merged 2 commits into from
Jan 3, 2024
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[InstSimplify] Simplify the expression (a^c)&(a^~c) to zero and (a^c) | (a^~c) to minus one. #76637

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966d3ae
[InstSimplify] Add pre-commit tests for PR75692. NFC.
ChipsSpectre Jan 2, 2024
bc275d6
[InstSimplify] Fold (X ^ C) & (X ^ ~C) into zero and (X ^ C) | (X ^ ~…
ChipsSpectre Jan 2, 2024
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12 changes: 12 additions & 0 deletions llvm/lib/Analysis/InstructionSimplify.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2204,6 +2204,13 @@ static Value *simplifyAndInst(Value *Op0, Value *Op1, const SimplifyQuery &Q,
match(Op1, m_c_Xor(m_Specific(Or), m_Specific(Y))))
return Constant::getNullValue(Op0->getType());

const APInt *C1;
Value *A;
// (A ^ C) & (A ^ ~C) -> 0
if (match(Op0, m_Xor(m_Value(A), m_APInt(C1))) &&
match(Op1, m_Xor(m_Specific(A), m_SpecificInt(~*C1))))
return Constant::getNullValue(Op0->getType());

if (Op0->getType()->isIntOrIntVectorTy(1)) {
if (std::optional<bool> Implied = isImpliedCondition(Op0, Op1, Q.DL)) {
// If Op0 is true implies Op1 is true, then Op0 is a subset of Op1.
Expand Down Expand Up @@ -2473,6 +2480,11 @@ static Value *simplifyOrInst(Value *Op0, Value *Op1, const SimplifyQuery &Q,
if (Value *V = threadBinOpOverPHI(Instruction::Or, Op0, Op1, Q, MaxRecurse))
return V;

// (A ^ C) | (A ^ ~C) -> -1, i.e. all bits set to one.
if (match(Op0, m_Xor(m_Value(A), m_APInt(C1))) &&
match(Op1, m_Xor(m_Specific(A), m_SpecificInt(~*C1))))
return Constant::getAllOnesValue(Op0->getType());

if (Op0->getType()->isIntOrIntVectorTy(1)) {
if (std::optional<bool> Implied =
isImpliedCondition(Op0, Op1, Q.DL, false)) {
Expand Down
39 changes: 39 additions & 0 deletions llvm/test/Transforms/InstCombine/and-xor-merge.ll
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Expand Up @@ -40,3 +40,42 @@ define i32 @PR38781(i32 %a, i32 %b) {
%and = and i32 %b.lobit.not, %a.lobit.not
ret i32 %and
}

; (a ^ 4) & (a ^ ~4) -> 0
define i32 @PR75692_1(i32 %x) {
; CHECK-LABEL: @PR75692_1
; CHECK-NEXT: ret i32 0
;
%t2 = xor i32 %x, 4
%t3 = xor i32 %x, -5
%t4 = and i32 %t2, %t3
ret i32 %t4
}

; (a ^ 4) & (a ^ 3) is not zero
define i32 @PR75692_2(i32 %x) {
; CHECK-LABEL: @PR75692_2
; CHECK-NEXT: %t2 = xor i32 %x, 4
; CHECK-NEXT: %t3 = xor i32 %x, -4
; CHECK-NEXT: %t4 = and i32 %t2, %t3
; CHECK-NEXT: ret i32 %t4
;
%t2 = xor i32 %x, 4
%t3 = xor i32 %x, -4
%t4 = and i32 %t2, %t3
ret i32 %t4
}

; (a ^ 4) & (b ^ ~4) is not zero, since a != b is possible
define i32 @PR75692_3(i32 %x, i32 %y) {
; CHECK-LABEL: @PR75692_3
; CHECK-NEXT: %t2 = xor i32 %x, 4
; CHECK-NEXT: %t3 = xor i32 %y, -5
; CHECK-NEXT: %t4 = and i32 %t2, %t3
; CHECK-NEXT: ret i32 %t4
;
%t2 = xor i32 %x, 4
%t3 = xor i32 %y, -5
%t4 = and i32 %t2, %t3
ret i32 %t4
}
39 changes: 39 additions & 0 deletions llvm/test/Transforms/InstCombine/or-xor.ll
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Expand Up @@ -1055,3 +1055,42 @@ define i8 @or_nand_xor_common_op_commute3_use3(i8 %x, i8 %y, i8 %z) {
%r = or i8 %xor, %nand
ret i8 %r
}

; (a ^ 4) & (a ^ ~4) -> -1
define i32 @PR75692_1(i32 %x) {
; CHECK-LABEL: @PR75692_1(
; CHECK-NEXT: ret i32 -1
;
%t2 = xor i32 %x, 4
%t3 = xor i32 %x, -5
%t4 = or i32 %t2, %t3
ret i32 %t4
}

; (a ^ 4) & (a ^ 3) is not -1
define i32 @PR75692_2(i32 %x) {
; CHECK-LABEL: @PR75692_2
; CHECK-NEXT: %t2 = xor i32 %x, 4
; CHECK-NEXT: %t3 = xor i32 %x, -4
; CHECK-NEXT: %t4 = or i32 %t2, %t3
; CHECK-NEXT: ret i32 %t4
;
%t2 = xor i32 %x, 4
%t3 = xor i32 %x, -4
%t4 = or i32 %t2, %t3
ret i32 %t4
}

; (a ^ 4) & (b ^ ~4) is not -1, since a != b is possible
define i32 @PR75692_3(i32 %x, i32 %y) {
; CHECK-LABEL: @PR75692_3
; CHECK-NEXT: %t2 = xor i32 %x, 4
; CHECK-NEXT: %t3 = xor i32 %y, -5
; CHECK-NEXT: %t4 = or i32 %t2, %t3
; CHECK-NEXT: ret i32 %t4
;
%t2 = xor i32 %x, 4
%t3 = xor i32 %y, -5
%t4 = or i32 %t2, %t3
ret i32 %t4
}