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[mlir][gpu] Fix GPU YieldOP format and traits #78006
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This patch adds assembly format to `gpu::YieldOp`. It also adds the return like trait, to make it compatible with `RegionBranchOpInterface`.
@llvm/pr-subscribers-mlir-gpu @llvm/pr-subscribers-mlir Author: Fabian Mora (fabianmcg) ChangesThis patch adds assembly format to Full diff: https://github.com/llvm/llvm-project/pull/78006.diff 4 Files Affected:
diff --git a/mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h b/mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h
index 58c0719c6a410c..96e1935bd0a841 100644
--- a/mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h
+++ b/mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h
@@ -23,6 +23,7 @@
#include "mlir/IR/OpDefinition.h"
#include "mlir/IR/OpImplementation.h"
#include "mlir/IR/SymbolTable.h"
+#include "mlir/Interfaces/ControlFlowInterfaces.h"
#include "mlir/Interfaces/FunctionInterfaces.h"
#include "mlir/Interfaces/InferIntRangeInterface.h"
#include "mlir/Interfaces/InferTypeOpInterface.h"
diff --git a/mlir/include/mlir/Dialect/GPU/IR/GPUOps.td b/mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
index 8d4a110ee801f0..71f6a2bc5fa2f8 100644
--- a/mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
+++ b/mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
@@ -22,6 +22,7 @@ include "mlir/Dialect/GPU/TransformOps/GPUDeviceMappingAttr.td"
include "mlir/IR/CommonTypeConstraints.td"
include "mlir/IR/EnumAttr.td"
include "mlir/IR/SymbolInterfaces.td"
+include "mlir/Interfaces/ControlFlowInterfaces.td"
include "mlir/Interfaces/DataLayoutInterfaces.td"
include "mlir/Interfaces/FunctionInterfaces.td"
include "mlir/Interfaces/InferIntRangeInterface.td"
@@ -961,7 +962,7 @@ def GPU_TerminatorOp : GPU_Op<"terminator", [HasParent<"LaunchOp">,
let assemblyFormat = "attr-dict";
}
-def GPU_YieldOp : GPU_Op<"yield", [Pure, Terminator]>,
+def GPU_YieldOp : GPU_Op<"yield", [Pure, ReturnLike, Terminator]>,
Arguments<(ins Variadic<AnyType>:$values)> {
let summary = "GPU yield operation";
let description = [{
@@ -974,6 +975,8 @@ def GPU_YieldOp : GPU_Op<"yield", [Pure, Terminator]>,
gpu.yield %f0, %f1 : f32, f32
```
}];
+
+ let assemblyFormat = "attr-dict ($values^ `:` type($values))?";
}
// These mirror the reduction combining kinds from the vector dialect.
diff --git a/mlir/lib/Dialect/GPU/CMakeLists.txt b/mlir/lib/Dialect/GPU/CMakeLists.txt
index 8f289ce9452e80..e5776e157b612c 100644
--- a/mlir/lib/Dialect/GPU/CMakeLists.txt
+++ b/mlir/lib/Dialect/GPU/CMakeLists.txt
@@ -37,6 +37,7 @@ add_mlir_dialect_library(MLIRGPUDialect
LINK_LIBS PUBLIC
MLIRArithDialect
MLIRDLTIDialect
+ MLIRControlFlowInterfaces
MLIRFunctionInterfaces
MLIRInferIntRangeInterface
MLIRIR
diff --git a/mlir/test/Dialect/GPU/ops.mlir b/mlir/test/Dialect/GPU/ops.mlir
index 60512424383052..5e60d91e475795 100644
--- a/mlir/test/Dialect/GPU/ops.mlir
+++ b/mlir/test/Dialect/GPU/ops.mlir
@@ -94,6 +94,17 @@ module attributes {gpu.container_module} {
// CHECK-NEXT: } : (f32) -> f32
%sum1 = gpu.all_reduce add %one uniform {} : (f32) -> f32
+ // CHECK: %{{.*}} = gpu.all_reduce %{{.*}} {
+ // CHECK-NEXT: ^{{.*}}(%{{.*}}: f32, %{{.*}}: f32):
+ // CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
+ // CHECK-NEXT: gpu.yield %{{.*}} : f32
+ // CHECK-NEXT: } : (f32) -> f32
+ %sum2 = gpu.all_reduce %one {
+ ^bb(%lhs : f32, %rhs : f32):
+ %tmp = arith.addf %lhs, %rhs : f32
+ gpu.yield %tmp : f32
+ } : (f32) -> (f32)
+
// CHECK: %{{.*}} = gpu.subgroup_reduce add %{{.*}} : (f32) -> f32
%sum_subgroup = gpu.subgroup_reduce add %one : (f32) -> f32
|
joker-eph
approved these changes
Jan 15, 2024
Thanks! |
justinfargnoli
pushed a commit
to justinfargnoli/llvm-project
that referenced
this pull request
Jan 28, 2024
This patch adds assembly format to `gpu::YieldOp`. It also adds the return like trait, to make it compatible with `RegionBranchOpInterface`.
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This patch adds assembly format to
gpu::YieldOp
. It also adds the return like trait, to make it compatible withRegionBranchOpInterface
.