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[AMDGPU] Fix hang caused by VS_CNT handling at calls #78318

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Jan 17, 2024
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2 changes: 1 addition & 1 deletion llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -293,7 +293,7 @@ class WaitcntBrackets {
}

void setStateOnFunctionEntryOrReturn() {
setScoreUB(VS_CNT, getScoreLB(VS_CNT) + getWaitCountMax(VS_CNT));
setScoreUB(VS_CNT, getScoreUB(VS_CNT) + getWaitCountMax(VS_CNT));
PendingEvents |= WaitEventMaskForInst[VS_CNT];
}

Expand Down
50 changes: 50 additions & 0 deletions llvm/test/CodeGen/AMDGPU/insert-waitcnts-hang.mir
Original file line number Diff line number Diff line change
@@ -0,0 +1,50 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass si-insert-waitcnts %s -o - | FileCheck %s

---
name: test
tracksRegLiveness: true
stack:
- { id: 0, name: '', type: spill-slot, offset: 4, size: 40, alignment: 4,
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
machineFunctionInfo:
frameOffsetReg: '$sgpr33'
body: |
; CHECK-LABEL: name: test
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $vgpr0, $vgpr1, $vgpr31, $vgpr40, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_WAITCNT 0
; CHECK-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed undef $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr33, 4, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17 :: (store (s128) into %stack.0, align 4, addrspace 5)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $vgpr31, $vgpr40, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $vgpr0_vgpr1:0x000000000000000F
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed undef renamable $sgpr0_sgpr1, 0, csr_amdgpu
; CHECK-NEXT: S_CBRANCH_EXECNZ %bb.1, implicit $exec
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: liveins: $sgpr46, $vgpr40
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_SETPC_B64_return undef $sgpr30_sgpr31
bb.0:
successors: %bb.1(0x80000000)
liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $vgpr0, $vgpr1, $vgpr31, $vgpr40, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11

SCRATCH_STORE_DWORDX4_SADDR killed undef $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr33, 4, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17 :: (store (s128) into %stack.0, align 4, addrspace 5)

bb.1:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $vgpr31, $vgpr40, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $vgpr0_vgpr1:0x000000000000000F

dead $sgpr30_sgpr31 = SI_CALL killed undef renamable $sgpr0_sgpr1, 0, csr_amdgpu
S_CBRANCH_EXECNZ %bb.1, implicit $exec

bb.2:
liveins: $sgpr46, $vgpr40

S_SETPC_B64_return undef $sgpr30_sgpr31
...