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[InstCombine] combine mul(abs(x),abs(y)) to abs(mul(x,y)) #78395

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Merged
merged 4 commits into from
Jan 18, 2024
Merged

[InstCombine] combine mul(abs(x),abs(y)) to abs(mul(x,y)) #78395

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e2b34d6
[NFC][instCombine]Add mul(abs(x), abs(y))->abs(mul(x,y)) test
HerrCai0907 Jan 17, 2024
c4b7a9d
[instCombine]combine mul(abs(x),abs(y)) to abs(mul(x,y))
HerrCai0907 Jan 17, 2024
73dbfcb
fix
HerrCai0907 Jan 17, 2024
debd597
add oneuse
HerrCai0907 Jan 17, 2024
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13 changes: 13 additions & 0 deletions llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -330,6 +330,19 @@ Instruction *InstCombinerImpl::visitMul(BinaryOperator &I) {
return BinaryOperator::CreateMul(X, X);
}

{
Value *X, *Y;
// abs(X) * abs(Y) -> abs(X * Y)
if (I.hasNoSignedWrap() &&
match(Op0,
m_OneUse(m_Intrinsic<Intrinsic::abs>(m_Value(X), m_One()))) &&
match(Op1, m_OneUse(m_Intrinsic<Intrinsic::abs>(m_Value(Y), m_One()))))
return replaceInstUsesWith(
I, Builder.CreateBinaryIntrinsic(Intrinsic::abs,
Builder.CreateNSWMul(X, Y),
Builder.getTrue()));
}

// -X * C --> X * -C
Value *X, *Y;
Constant *Op1C;
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67 changes: 67 additions & 0 deletions llvm/test/Transforms/InstCombine/mul.ll
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Expand Up @@ -1649,6 +1649,73 @@ define <vscale x 2 x i64> @mul_scalable_splat_zero(<vscale x 2 x i64> %z) {
ret <vscale x 2 x i64> %t3
}

; fold mul(abs(x),abs(y)) -> abs(mul(x,y))
define i32 @combine_mul_abs_x_abs_y(i32 %x, i32 %y) {
; CHECK-LABEL: @combine_mul_abs_x_abs_y(
; CHECK-NEXT: [[TMP1:%.*]] = mul nsw i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[MUL:%.*]] = call i32 @llvm.abs.i32(i32 [[TMP1]], i1 true)
; CHECK-NEXT: ret i32 [[MUL]]
;
%abs_x = call i32 @llvm.abs.i32(i32 %x, i1 true)
%abs_y = call i32 @llvm.abs.i32(i32 %y, i1 true)
%mul = mul nsw i32 %abs_x, %abs_y
ret i32 %mul
}

define i32 @combine_mul_abs_x_abs_y_no_nsw(i32 %x, i32 %y) {
; CHECK-LABEL: @combine_mul_abs_x_abs_y_no_nsw(
; CHECK-NEXT: [[ABS_X:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: [[ABS_Y:%.*]] = call i32 @llvm.abs.i32(i32 [[Y:%.*]], i1 true)
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[ABS_X]], [[ABS_Y]]
; CHECK-NEXT: ret i32 [[MUL]]
;
%abs_x = call i32 @llvm.abs.i32(i32 %x, i1 true)
%abs_y = call i32 @llvm.abs.i32(i32 %y, i1 true)
%mul = mul i32 %abs_x, %abs_y
ret i32 %mul
}

define i32 @combine_mul_abs_x_abs_y_poison_1(i32 %x, i32 %y) {
; CHECK-LABEL: @combine_mul_abs_x_abs_y_poison_1(
; CHECK-NEXT: [[ABS_X:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: [[ABS_Y:%.*]] = call i32 @llvm.abs.i32(i32 [[Y:%.*]], i1 false)
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[ABS_X]], [[ABS_Y]]
; CHECK-NEXT: ret i32 [[MUL]]
;
%abs_x = call i32 @llvm.abs.i32(i32 %x, i1 true)
%abs_y = call i32 @llvm.abs.i32(i32 %y, i1 false)
%mul = mul nsw i32 %abs_x, %abs_y
ret i32 %mul
}

define i32 @combine_mul_abs_x_abs_y_poison_2(i32 %x, i32 %y) {
; CHECK-LABEL: @combine_mul_abs_x_abs_y_poison_2(
; CHECK-NEXT: [[ABS_X:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[ABS_Y:%.*]] = call i32 @llvm.abs.i32(i32 [[Y:%.*]], i1 false)
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[ABS_X]], [[ABS_Y]]
; CHECK-NEXT: ret i32 [[MUL]]
;
%abs_x = call i32 @llvm.abs.i32(i32 %x, i1 false)
%abs_y = call i32 @llvm.abs.i32(i32 %y, i1 false)
%mul = mul nsw i32 %abs_x, %abs_y
ret i32 %mul
}

define i32 @combine_mul_abs_x_abs_y_not_oneuse(i32 %x, i32 %y) {
; CHECK-LABEL: @combine_mul_abs_x_abs_y_not_oneuse(
; CHECK-NEXT: [[ABS_X:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: [[ABS_Y:%.*]] = call i32 @llvm.abs.i32(i32 [[Y:%.*]], i1 true)
; CHECK-NEXT: [[ABS_X1:%.*]] = add nuw i32 [[ABS_Y]], 1
; CHECK-NEXT: [[RET:%.*]] = mul i32 [[ABS_X]], [[ABS_X1]]
; CHECK-NEXT: ret i32 [[RET]]
;
%abs_x = call i32 @llvm.abs.i32(i32 %x, i1 true)
%abs_y = call i32 @llvm.abs.i32(i32 %y, i1 true)
%mul = mul nsw i32 %abs_x, %abs_y
%ret = add i32 %mul, %abs_x
ret i32 %ret
}

;
; fold mul(sub(x,y),negpow2) -> shl(sub(y,x),log2(pow2))
;
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