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[AMDGPU] Emit a waitcnt instruction after each memory instruction #79236

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Merged
merged 16 commits into from
Apr 10, 2024
Merged

[AMDGPU] Emit a waitcnt instruction after each memory instruction #79236

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502406d
[AMDGPU] Emit a waitcnt instruction after each memory instruction
Jan 24, 2024
6624b6a
Combined insertions of waitcnt with existing SIMemoryLegalizer code.
Jan 31, 2024
8abdc34
Merge code for precise mem with the existing SICacheControl classes.
Feb 12, 2024
adaa16c
Add support for GFX12.
Feb 14, 2024
c02b87b
Some small changes based on code review.
Feb 15, 2024
571ce58
Code formatting.
Feb 15, 2024
93b00bf
Change the option from amdgpu-precise-memory-op to precise-memory
Feb 21, 2024
c42d3fb
Move implementation from SIMemoryLegalizer to SIInsertWaitcnts.
Feb 29, 2024
44bada0
Minor code change.
Mar 26, 2024
20312a1
Use getAllZeroWaitcnt() when creating the Wait obj. Some changes
Mar 27, 2024
12dde5f
Use update_llc_test_checks.py on insert_waitcnt_for_precise_memory.ll.
Mar 29, 2024
1e3c7dd
Replace testcases test_load_store() and test_load_store_as5() with
Apr 1, 2024
4f4bf31
Check if mem instruciton is already immediately followed by a
Apr 2, 2024
4ae38b6
Change iterator update operator from post-inc to pre-inc.
Apr 2, 2024
49cad2d
With #87539, previous commit that checks for the instruction immediately
Apr 4, 2024
6d52f6e
Add testcase that covers flat_atomic_swap, an atomic without return.
Apr 9, 2024
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3 changes: 3 additions & 0 deletions clang/include/clang/Driver/Options.td
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Original file line number Diff line number Diff line change
Expand Up @@ -4902,6 +4902,9 @@ defm tgsplit : SimpleMFlag<"tgsplit", "Enable", "Disable",
defm wavefrontsize64 : SimpleMFlag<"wavefrontsize64",
"Specify wavefront size 64", "Specify wavefront size 32",
" mode (AMDGPU only)">;
defm amdgpu_precise_memory_op
: SimpleMFlag<"amdgpu-precise-memory-op", "Enable", "Disable",
" precise memory mode (AMDGPU only)">;

defm unsafe_fp_atomics : BoolMOption<"unsafe-fp-atomics",
TargetOpts<"AllowAMDGPUUnsafeFPAtomics">, DefaultFalse,
Expand Down
4 changes: 4 additions & 0 deletions clang/lib/Driver/ToolChains/AMDGPU.cpp
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Expand Up @@ -670,6 +670,10 @@ void amdgpu::getAMDGPUTargetFeatures(const Driver &D,
options::OPT_mno_wavefrontsize64, false))
Features.push_back("+wavefrontsize64");

if (Args.hasFlag(options::OPT_mamdgpu_precise_memory_op,
options::OPT_mno_amdgpu_precise_memory_op, false))
Features.push_back("+precise-memory");

handleTargetFeaturesGroup(D, Triple, Args, Features,
options::OPT_m_amdgpu_Features_Group);
}
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6 changes: 6 additions & 0 deletions clang/test/Driver/amdgpu-features.c
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Expand Up @@ -32,3 +32,9 @@

// RUN: %clang -### -target amdgcn -mcpu=gfx1010 -mno-cumode %s 2>&1 | FileCheck --check-prefix=NO-CUMODE %s
// NO-CUMODE: "-target-feature" "-cumode"

// RUN: %clang -### -target amdgcn -mcpu=gfx1010 -mamdgpu-precise-memory-op %s 2>&1 | FileCheck --check-prefix=PREC-MEM %s
// PREC-MEM: "-target-feature" "+precise-memory"

// RUN: %clang -### -target amdgcn -mcpu=gfx1010 -mno-amdgpu-precise-memory-op %s 2>&1 | FileCheck --check-prefix=NO-PREC-MEM %s
// NO-PREC-MEM-NOT: {{".*precise-memory"}}
4 changes: 4 additions & 0 deletions llvm/lib/Target/AMDGPU/AMDGPU.td
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Expand Up @@ -168,6 +168,10 @@ def FeatureCuMode : SubtargetFeature<"cumode",
"Enable CU wavefront execution mode"
>;

def FeaturePreciseMemory
: SubtargetFeature<"precise-memory", "EnablePreciseMemory",
"true", "Enable precise memory mode">;

def FeatureSGPRInitBug : SubtargetFeature<"sgpr-init-bug",
"SGPRInitBug",
"true",
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3 changes: 3 additions & 0 deletions llvm/lib/Target/AMDGPU/GCNSubtarget.h
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Expand Up @@ -87,6 +87,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
bool EnableTgSplit = false;
bool EnableCuMode = false;
bool TrapHandler = false;
bool EnablePreciseMemory = false;

// Used as options.
bool EnableLoadStoreOpt = false;
Expand Down Expand Up @@ -599,6 +600,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
return EnableCuMode;
}

bool isPreciseMemoryEnabled() const { return EnablePreciseMemory; }

bool hasFlatAddressSpace() const {
return FlatAddressSpace;
}
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8 changes: 8 additions & 0 deletions llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
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Expand Up @@ -2305,6 +2305,14 @@ bool SIInsertWaitcnts::insertWaitcntInBlock(MachineFunction &MF,
}
#endif

if (ST->isPreciseMemoryEnabled() && Inst.mayLoadOrStore()) {
AMDGPU::Waitcnt Wait = WCG->getAllZeroWaitcnt(
Inst.mayStore() && !SIInstrInfo::isAtomicRet(Inst));
ScoreBrackets.simplifyWaitcnt(Wait);
Modified |= generateWaitcnt(Wait, std::next(Inst.getIterator()), Block,
ScoreBrackets, /*OldWaitcntInstr=*/nullptr);
}

LLVM_DEBUG({
Inst.print(dbgs());
ScoreBrackets.dump();
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