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[X86] Support EVEX compression from MOVBErr to BSWAP #79775

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Merged
merged 4 commits into from
Jan 30, 2024
Merged

[X86] Support EVEX compression from MOVBErr to BSWAP #79775

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a7f4c0c
[X86] Support encoding compress from movberr to bwap
XinWang10 Jan 29, 2024
ca97890
fix typo
XinWang10 Jan 29, 2024
8c8ada9
resolve comments
XinWang10 Jan 30, 2024
87077c3
append
XinWang10 Jan 30, 2024
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9 changes: 6 additions & 3 deletions llvm/lib/Target/X86/X86CompressEVEX.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -225,9 +225,12 @@ static bool CompressEVEXImpl(MachineInstr &MI, const X86Subtarget &ST) {
//
// For AVX512 cases, EVEX prefix is needed in order to carry this information
// thus preventing the transformation to VEX encoding.
// MOVBE*rr is special because it has semantic of NDD but not set EVEX_B.
bool IsMovberr =
MI.getOpcode() == X86::MOVBE32rr || MI.getOpcode() == X86::MOVBE64rr;
bool IsND = X86II::hasNewDataDest(TSFlags);
if (TSFlags & X86II::EVEX_B)
if (!IsND || !isRedundantNewDataDest(MI, ST))
if ((TSFlags & X86II::EVEX_B) || IsMovberr)
if (!IsND && !IsMovberr || !isRedundantNewDataDest(MI, ST))
return false;

ArrayRef<X86CompressEVEXTableEntry> Table = ArrayRef(X86CompressEVEXTable);
Expand All @@ -239,7 +242,7 @@ static bool CompressEVEXImpl(MachineInstr &MI, const X86Subtarget &ST) {
return false;
}

if (!IsND) {
if (!IsND && !IsMovberr) {
if (usesExtendedRegister(MI) || !checkPredicate(I->NewOpc, &ST) ||
!performCustomAdjustments(MI, I->NewOpc))
return false;
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10 changes: 10 additions & 0 deletions llvm/test/CodeGen/X86/apx/compress-evex.mir
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Expand Up @@ -71,3 +71,13 @@ body: |
renamable $rax = XOR64rr_NF_ND killed renamable $rax, killed renamable $r16
RET64 $rax
...
---
name: bswapr_to_movberr
body: |
bb.0.entry:
liveins: $rax
; CHECK: bswapq %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0xc8]
renamable $rax = MOVBE64rr killed renamable $rax
RET64 killed $rax
...
2 changes: 2 additions & 0 deletions llvm/utils/TableGen/X86ManualCompressEVEXTables.def
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Expand Up @@ -328,4 +328,6 @@ ENTRY(VBROADCASTSDZ256rm, VBROADCASTSDYrm)
ENTRY(VBROADCASTSDZ256rr, VBROADCASTSDYrr)
ENTRY(VPBROADCASTQZ256rm, VPBROADCASTQYrm)
ENTRY(VPBROADCASTQZ256rr, VPBROADCASTQYrr)
ENTRY(MOVBE32rr, BSWAP32r)
ENTRY(MOVBE64rr, BSWAP64r)
#undef ENTRY