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[X86][test] Remove useless pattern for VDPBF16PSZmb and add a test for broadcast folding #80629

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Merged
merged 2 commits into from
Feb 5, 2024
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[X86][test] Remove useless pattern for VDPBF16PSZmb and add a test for broadcast folding #80629

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ef5f4c6
[X86][test] Remove useless pattern for VDPBF16PSZmb and add a test fo…
KanRobert Feb 5, 2024
1628d1a
fix lit test resources-avx512bf16.s
KanRobert Feb 5, 2024
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4 changes: 2 additions & 2 deletions llvm/lib/Target/X86/X86InstrAVX512.td
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Original file line number Diff line number Diff line change
Expand Up @@ -12716,13 +12716,13 @@ multiclass avx512_dpbf16ps_rm<bits<8> opc, string OpcodeStr, SDNode OpNode,
(src_v.LdFrag addr:$src3)))>, EVEX, VVVV,
Sched<[sched.Folded, sched.ReadAfterFold]>;

let mayLoad = 1, hasSideEffects = 0 in
defm mb: AVX512_maskable_3src<opc, MRMSrcMem, _, (outs _.RC:$dst),
(ins src_v.RC:$src2, f32mem:$src3),
OpcodeStr,
!strconcat("${src3}", _.BroadcastStr,", $src2"),
!strconcat("$src2, ${src3}", _.BroadcastStr),
(_.VT (OpNode _.RC:$src1, src_v.RC:$src2,
(src_v.VT (src_v.BroadcastLdFrag addr:$src3))))>,
(null_frag)>,
EVEX_B, EVEX, VVVV, Sched<[sched.Folded, sched.ReadAfterFold]>;

}
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18 changes: 18 additions & 0 deletions llvm/test/CodeGen/X86/fold-broadcast.ll
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@@ -0,0 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 < %s | FileCheck %s

define <16 x float> @mm512_dpbf16_ps_broadcast_rhs(<16 x float> noundef %acc, <32 x bfloat> noundef %lhs, ptr nocapture noundef readonly %rhs) {
; CHECK-LABEL: mm512_dpbf16_ps_broadcast_rhs:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vdpbf16ps (%rdi){1to16}, %zmm1, %zmm0
; CHECK-NEXT: retq
entry:
%0 = load float, ptr %rhs, align 4
%vecinit.i = insertelement <16 x float> poison, float %0, i64 0
%vecinit15.i = shufflevector <16 x float> %vecinit.i, <16 x float> poison, <16 x i32> zeroinitializer
%1 = bitcast <16 x float> %vecinit15.i to <32 x bfloat>
%2 = tail call <16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float> %acc, <32 x bfloat> %lhs, <32 x bfloat> %1)
ret <16 x float> %2
}

declare <16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float>, <32 x bfloat>, <32 x bfloat>)