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Fix failing testcases #80902

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Merged
merged 1 commit into from
Feb 6, 2024
Merged

Fix failing testcases #80902

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42 changes: 21 additions & 21 deletions llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess2.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+aix-small-local-exec-tls \
; RUN: -mtriple powerpc64-ibm-aix-xcoff -xcoff-traceback-table=false \
; RUN: --code-model=large -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS %s
; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS %s

@mySmallLocalExecTLS6 = external thread_local(localexec) global [60 x i64], align 8
@mySmallLocalExecTLS2 = thread_local(localexec) global [3000 x i64] zeroinitializer, align 8
Expand Down Expand Up @@ -105,56 +105,56 @@ entry:
ret i64 %add11
}

; DIS: 0000000000000000 (idx: 7) .StoreLargeAccess1:
; DIS: 0000000000000000 (idx: [[#NFA+7]]) .StoreLargeAccess1:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} mflr 0
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stdu 1, -48(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 212
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 0, 64(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 4, 2, 0
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 13) MyTLSGDVar[TE]
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+13]]) MyTLSGDVar[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 4, 0(4)
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 13) MyTLSGDVar[TE]
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+13]]) MyTLSGDVar[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 3, 424(13)
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 1) mySmallLocalExecTLS6[UL]
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+1]]) mySmallLocalExecTLS6[UL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 203
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 3, 1200(13)
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 17) mySmallLocalExecTLS2[TL]
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+17]]) mySmallLocalExecTLS2[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 15) .MyTLSGDVar[TE]
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+15]]) .MyTLSGDVar[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 3, 8(3)
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 15) .MyTLSGDVar[TE]
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+15]]) .MyTLSGDVar[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 3) .__tls_get_addr[PR]
; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+3]]) .__tls_get_addr[PR]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 4, 44
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 4, 440(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 6
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 4, 100
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 3, 32400(13)
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 21) mySmallLocalExecTLS3[TL]
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+21]]) mySmallLocalExecTLS3[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 882
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 4, -4336(13)
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 23) mySmallLocalExecTLS4[TL]
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+23]]) mySmallLocalExecTLS4[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 3, 21264(13)
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 25) mySmallLocalExecTLS5[TL]
; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+25]]) mySmallLocalExecTLS5[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 1191
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 1, 1, 48
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 0, 16(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} mtlr 0
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} blr

; DIS: Disassembly of section .data:
; DIS: 0000000000000068 (idx: 9) StoreLargeAccess1[DS]:
; DIS: 0000000000000068 (idx: [[#NFA+9]]) StoreLargeAccess1[DS]:
; DIS-NEXT: 68: 00 00 00 00
; DIS-NEXT: 0000000000000068: R_POS (idx: 7) .StoreLargeAccess1
; DIS-NEXT: 0000000000000068: R_POS (idx: [[#NFA+7]]) .StoreLargeAccess1
; DIS-NEXT: 6c: 00 00 00 00
; DIS-NEXT: 70: 00 00 00 00
; DIS-NEXT: 0000000000000070: R_POS (idx: 11) TOC[TC0]
; DIS-NEXT: 0000000000000070: R_POS (idx: [[#NFA+11]]) TOC[TC0]
; DIS-NEXT: 74: 00 00 00 80

; DIS: Disassembly of section .tdata:
; DIS: 0000000000000000 (idx: 17) mySmallLocalExecTLS2[TL]:
; DIS: 0000000000005dc0 (idx: 19) MyTLSGDVar[TL]:
; DIS: 00000000000076c0 (idx: 21) mySmallLocalExecTLS3[TL]:
; DIS: 000000000000d480 (idx: 23) mySmallLocalExecTLS4[TL]:
; DIS: 0000000000013240 (idx: 25) mySmallLocalExecTLS5[TL]:
; DIS: 0000000000019000 (idx: 27) mySmallLocalExecTLS[TL]:
; DIS: 0000000000000000 (idx: [[#NFA+17]]) mySmallLocalExecTLS2[TL]:
; DIS: 0000000000005dc0 (idx: [[#NFA+19]]) MyTLSGDVar[TL]:
; DIS: 00000000000076c0 (idx: [[#NFA+21]]) mySmallLocalExecTLS3[TL]:
; DIS: 000000000000d480 (idx: [[#NFA+23]]) mySmallLocalExecTLS4[TL]:
; DIS: 0000000000013240 (idx: [[#NFA+25]]) mySmallLocalExecTLS5[TL]:
; DIS: 0000000000019000 (idx: [[#NFA+27]]) mySmallLocalExecTLS[TL]:
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -175,7 +175,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: File Auxiliary Entry {
; SYM-NEXT: Index: 2
; SYM-NEXT: Name: LLVM version 18.0.0git
; SYM-NEXT: Name: LLVM
; SYM-NEXT: Type: XFT_CV (0x2)
; SYM64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
; SYM-NEXT: }
Expand Down