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[RISCV] Always use signed APSInt in getExactInteger. #84070

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Merged
merged 1 commit into from
Mar 5, 2024
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[RISCV] Always use signed APSInt in getExactInteger. #84070

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4 changes: 3 additions & 1 deletion llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3233,7 +3233,9 @@ struct VIDSequence {

static std::optional<uint64_t> getExactInteger(const APFloat &APF,
uint32_t BitWidth) {
APSInt ValInt(BitWidth, !APF.isNegative());
// We will use a SINT_TO_FP to materialize this constant so we should use a
// signed APSInt here.
APSInt ValInt(BitWidth, /*IsUnsigned*/ false);
// We use an arbitrary rounding mode here. If a floating-point is an exact
// integer (e.g., 1.0), the rounding mode does not affect the output value. If
// the rounding mode changes the output value, then it is not an exact
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11 changes: 5 additions & 6 deletions llvm/test/CodeGen/RISCV/rvv/vle_vid-vfcvt.ll
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Expand Up @@ -113,16 +113,15 @@ entry:
ret void
}

; FIXME: This is miscompiled. This will create -2147483648.0 instead of
; 2147483648.0 for the 4th element.
; Make sure we don't try to use vid+vsll+vfcvt. We previously flipped the sign
; of 2147483648.0.
define void @foo_9(ptr nocapture noundef writeonly %t) {
; CHECK-LABEL: foo_9:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lui a1, %hi(.LCPI8_0)
; CHECK-NEXT: addi a1, a1, %lo(.LCPI8_0)
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
; CHECK-NEXT: vid.v v8
; CHECK-NEXT: vsll.vi v8, v8, 31
; CHECK-NEXT: vrsub.vi v8, v8, 0
; CHECK-NEXT: vfcvt.f.x.v v8, v8
; CHECK-NEXT: vle32.v v8, (a1)
; CHECK-NEXT: vse32.v v8, (a0)
; CHECK-NEXT: ret
entry:
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