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[mlir][EmitC] Allow further ops within expressions #84284

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Merged
merged 2 commits into from
Mar 7, 2024
Merged

[mlir][EmitC] Allow further ops within expressions #84284

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f96c7e0
[mlir][EmitC] Allow further ops within expressions
marbre Mar 7, 2024
8b9b72c
Fix precedence for sub and add
marbre Mar 7, 2024
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22 changes: 12 additions & 10 deletions mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
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Original file line number Diff line number Diff line change
Expand Up @@ -106,7 +106,7 @@ def EmitC_ApplyOp : EmitC_Op<"apply", [CExpression]> {
let hasVerifier = 1;
}

def EmitC_BitwiseAndOp : EmitC_BinaryOp<"bitwise_and", []> {
def EmitC_BitwiseAndOp : EmitC_BinaryOp<"bitwise_and", [CExpression]> {
let summary = "Bitwise and operation";
let description = [{
With the `bitwise_and` operation the bitwise operator & (and) can
Expand All @@ -124,7 +124,8 @@ def EmitC_BitwiseAndOp : EmitC_BinaryOp<"bitwise_and", []> {
}];
}

def EmitC_BitwiseLeftShiftOp : EmitC_BinaryOp<"bitwise_left_shift", []> {
def EmitC_BitwiseLeftShiftOp : EmitC_BinaryOp<"bitwise_left_shift",
[CExpression]> {
let summary = "Bitwise left shift operation";
let description = [{
With the `bitwise_left_shift` operation the bitwise operator <<
Expand All @@ -142,7 +143,7 @@ def EmitC_BitwiseLeftShiftOp : EmitC_BinaryOp<"bitwise_left_shift", []> {
}];
}

def EmitC_BitwiseNotOp : EmitC_UnaryOp<"bitwise_not", []> {
def EmitC_BitwiseNotOp : EmitC_UnaryOp<"bitwise_not", [CExpression]> {
let summary = "Bitwise not operation";
let description = [{
With the `bitwise_not` operation the bitwise operator ~ (not) can
Expand All @@ -160,7 +161,7 @@ def EmitC_BitwiseNotOp : EmitC_UnaryOp<"bitwise_not", []> {
}];
}

def EmitC_BitwiseOrOp : EmitC_BinaryOp<"bitwise_or", []> {
def EmitC_BitwiseOrOp : EmitC_BinaryOp<"bitwise_or", [CExpression]> {
let summary = "Bitwise or operation";
let description = [{
With the `bitwise_or` operation the bitwise operator | (or)
Expand All @@ -178,7 +179,8 @@ def EmitC_BitwiseOrOp : EmitC_BinaryOp<"bitwise_or", []> {
}];
}

def EmitC_BitwiseRightShiftOp : EmitC_BinaryOp<"bitwise_right_shift", []> {
def EmitC_BitwiseRightShiftOp : EmitC_BinaryOp<"bitwise_right_shift",
[CExpression]> {
let summary = "Bitwise right shift operation";
let description = [{
With the `bitwise_right_shift` operation the bitwise operator >>
Expand All @@ -196,7 +198,7 @@ def EmitC_BitwiseRightShiftOp : EmitC_BinaryOp<"bitwise_right_shift", []> {
}];
}

def EmitC_BitwiseXorOp : EmitC_BinaryOp<"bitwise_xor", []> {
def EmitC_BitwiseXorOp : EmitC_BinaryOp<"bitwise_xor", [CExpression]> {
let summary = "Bitwise xor operation";
let description = [{
With the `bitwise_xor` operation the bitwise operator ^ (xor)
Expand Down Expand Up @@ -515,7 +517,7 @@ def EmitC_ForOp : EmitC_Op<"for",
}

def EmitC_CallOp : EmitC_Op<"call",
[CallOpInterface,
[CallOpInterface, CExpression,
DeclareOpInterfaceMethods<SymbolUserOpInterface>]> {
let summary = "call operation";
let description = [{
Expand Down Expand Up @@ -771,7 +773,7 @@ def EmitC_LiteralOp : EmitC_Op<"literal", [Pure]> {
let assemblyFormat = "$value attr-dict `:` type($result)";
}

def EmitC_LogicalAndOp : EmitC_BinaryOp<"logical_and", []> {
def EmitC_LogicalAndOp : EmitC_BinaryOp<"logical_and", [CExpression]> {
let summary = "Logical and operation";
let description = [{
With the `logical_and` operation the logical operator && (and) can
Expand All @@ -792,7 +794,7 @@ def EmitC_LogicalAndOp : EmitC_BinaryOp<"logical_and", []> {
let assemblyFormat = "operands attr-dict `:` type(operands)";
}

def EmitC_LogicalNotOp : EmitC_UnaryOp<"logical_not", []> {
def EmitC_LogicalNotOp : EmitC_UnaryOp<"logical_not", [CExpression]> {
let summary = "Logical not operation";
let description = [{
With the `logical_not` operation the logical operator ! (negation) can
Expand All @@ -813,7 +815,7 @@ def EmitC_LogicalNotOp : EmitC_UnaryOp<"logical_not", []> {
let assemblyFormat = "operands attr-dict `:` type(operands)";
}

def EmitC_LogicalOrOp : EmitC_BinaryOp<"logical_or", []> {
def EmitC_LogicalOrOp : EmitC_BinaryOp<"logical_or", [CExpression]> {
let summary = "Logical or operation";
let description = [{
With the `logical_or` operation the logical operator || (inclusive or)
Expand Down
26 changes: 18 additions & 8 deletions mlir/lib/Target/Cpp/TranslateToCpp.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -71,9 +71,17 @@ inline LogicalResult interleaveCommaWithError(const Container &c,
/// imply higher precedence.
static FailureOr<int> getOperatorPrecedence(Operation *operation) {
return llvm::TypeSwitch<Operation *, FailureOr<int>>(operation)
.Case<emitc::AddOp>([&](auto op) { return 11; })
.Case<emitc::ApplyOp>([&](auto op) { return 13; })
.Case<emitc::CastOp>([&](auto op) { return 13; })
.Case<emitc::AddOp>([&](auto op) { return 12; })
.Case<emitc::ApplyOp>([&](auto op) { return 15; })
.Case<emitc::BitwiseAndOp>([&](auto op) { return 7; })
.Case<emitc::BitwiseLeftShiftOp>([&](auto op) { return 11; })
.Case<emitc::BitwiseNotOp>([&](auto op) { return 15; })
.Case<emitc::BitwiseOrOp>([&](auto op) { return 5; })
.Case<emitc::BitwiseRightShiftOp>([&](auto op) { return 11; })
.Case<emitc::BitwiseXorOp>([&](auto op) { return 6; })
.Case<emitc::CallOp>([&](auto op) { return 16; })
.Case<emitc::CallOpaqueOp>([&](auto op) { return 16; })
.Case<emitc::CastOp>([&](auto op) { return 15; })
.Case<emitc::CmpOp>([&](auto op) -> FailureOr<int> {
switch (op.getPredicate()) {
case emitc::CmpPredicate::eq:
Expand All @@ -89,11 +97,13 @@ static FailureOr<int> getOperatorPrecedence(Operation *operation) {
}
return op->emitError("unsupported cmp predicate");
})
.Case<emitc::DivOp>([&](auto op) { return 12; })
.Case<emitc::MulOp>([&](auto op) { return 12; })
.Case<emitc::RemOp>([&](auto op) { return 12; })
.Case<emitc::SubOp>([&](auto op) { return 11; })
.Case<emitc::CallOpaqueOp>([&](auto op) { return 14; })
.Case<emitc::DivOp>([&](auto op) { return 13; })
.Case<emitc::LogicalAndOp>([&](auto op) { return 4; })
.Case<emitc::LogicalNotOp>([&](auto op) { return 15; })
.Case<emitc::LogicalOrOp>([&](auto op) { return 3; })
.Case<emitc::MulOp>([&](auto op) { return 13; })
.Case<emitc::RemOp>([&](auto op) { return 13; })
.Case<emitc::SubOp>([&](auto op) { return 12; })
.Default([](auto op) { return op->emitError("unsupported operation"); });
}

Expand Down