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[TableGen] More efficiency improvements for encode/decode emission. #84647

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Merged
merged 2 commits into from
Mar 11, 2024
Merged

[TableGen] More efficiency improvements for encode/decode emission. #84647

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ef7a9a5
[TableGen] More efficiency improvements for encode/decode emission.
nvjle Mar 9, 2024
21ff1d4
Address review comments.
nvjle Mar 11, 2024
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5 changes: 1 addition & 4 deletions llvm/utils/TableGen/CodeEmitterGen.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -434,10 +434,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
ArrayRef<const CodeGenInstruction *> NumberedInstructions =
Target.getInstructionsByEnumValue();

if (any_of(NumberedInstructions, [](const CodeGenInstruction *CGI) {
Record *R = CGI->TheDef;
return R->getValue("Inst") && isa<DagInit>(R->getValueInit("Inst"));
})) {
if (Target.hasVariableLengthEncodings()) {
emitVarLenCodeEmitter(Records, o);
} else {
const CodeGenHwModes &HWM = Target.getHwModes();
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9 changes: 7 additions & 2 deletions llvm/utils/TableGen/CodeGenInstruction.h
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Expand Up @@ -17,14 +17,13 @@
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGenTypes/MachineValueType.h"
#include "llvm/TableGen/Record.h"
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We don't need forward declarations below now.

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Done.

Thank you for the review.

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Or we can move implementation of isVariableLengthEncoding to llvm/utils/TableGen/CodeGenInstruction.cpp so that we don't need to mess includes. :-)

#include <cassert>
#include <string>
#include <utility>
#include <vector>

namespace llvm {
class Record;
class DagInit;
class CodeGenTarget;

class CGIOperandList {
Expand Down Expand Up @@ -333,6 +332,12 @@ class CodeGenInstruction {
return isOperandImpl("InOperandList", i, "IsImmediate");
}

/// Return true if the instruction uses a variable length encoding.
bool isVariableLengthEncoding() const {
const RecordVal *RV = TheDef->getValue("Inst");
return RV && isa<DagInit>(RV->getValue());
}

private:
bool isOperandImpl(StringRef OpListName, unsigned i,
StringRef PropertyName) const;
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7 changes: 5 additions & 2 deletions llvm/utils/TableGen/CodeGenTarget.cpp
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Expand Up @@ -480,8 +480,11 @@ void CodeGenTarget::ReadInstructions() const {
PrintFatalError("No 'Instruction' subclasses defined!");

// Parse the instructions defined in the .td file.
for (unsigned i = 0, e = Insts.size(); i != e; ++i)
Instructions[Insts[i]] = std::make_unique<CodeGenInstruction>(Insts[i]);
for (Record *R : Insts) {
Instructions[R] = std::make_unique<CodeGenInstruction>(R);
if (Instructions[R]->isVariableLengthEncoding())
HasVariableLengthEncodings = true;
}
}

static const CodeGenInstruction *GetInstByName(
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4 changes: 4 additions & 0 deletions llvm/utils/TableGen/CodeGenTarget.h
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Expand Up @@ -65,6 +65,7 @@ class CodeGenTarget {
mutable SmallVector<ValueTypeByHwMode, 8> LegalValueTypes;
CodeGenHwModes CGH;
std::vector<Record *> MacroFusions;
mutable bool HasVariableLengthEncodings = false;

void ReadRegAltNameIndices() const;
void ReadInstructions() const;
Expand Down Expand Up @@ -209,6 +210,9 @@ class CodeGenTarget {
}
inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }

/// Return whether instructions have variable length encodings on this target.
bool hasVariableLengthEncodings() const { return HasVariableLengthEncodings; }

/// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
///
bool isLittleEndianEncoding() const;
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18 changes: 6 additions & 12 deletions llvm/utils/TableGen/DecoderEmitter.cpp
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Expand Up @@ -2499,8 +2499,8 @@ void DecoderEmitter::run(raw_ostream &o) {
const auto &NumberedInstructions = Target.getInstructionsByEnumValue();
NumberedEncodings.reserve(NumberedInstructions.size());
for (const auto &NumberedInstruction : NumberedInstructions) {
if (const RecordVal *RV =
NumberedInstruction->TheDef->getValue("EncodingInfos")) {
const Record *InstDef = NumberedInstruction->TheDef;
if (const RecordVal *RV = InstDef->getValue("EncodingInfos")) {
if (DefInit *DI = dyn_cast_or_null<DefInit>(RV->getValue())) {
EncodingInfoByHwMode EBM(DI->getDef(), HWM);
for (auto &KV : EBM)
Expand All @@ -2513,12 +2513,11 @@ void DecoderEmitter::run(raw_ostream &o) {
// This instruction is encoded the same on all HwModes. Emit it for all
// HwModes by default, otherwise leave it in a single common table.
if (DecoderEmitterSuppressDuplicates) {
NumberedEncodings.emplace_back(NumberedInstruction->TheDef,
NumberedInstruction, "AllModes");
NumberedEncodings.emplace_back(InstDef, NumberedInstruction, "AllModes");
} else {
for (StringRef HwModeName : HwModeNames)
NumberedEncodings.emplace_back(NumberedInstruction->TheDef,
NumberedInstruction, HwModeName);
NumberedEncodings.emplace_back(InstDef, NumberedInstruction,
HwModeName);
}
}
for (const auto &NumberedAlias :
Expand All @@ -2531,12 +2530,7 @@ void DecoderEmitter::run(raw_ostream &o) {
OpcMap;
std::map<unsigned, std::vector<OperandInfo>> Operands;
std::vector<unsigned> InstrLen;

bool IsVarLenInst =
any_of(NumberedInstructions, [](const CodeGenInstruction *CGI) {
RecordVal *RV = CGI->TheDef->getValue("Inst");
return RV && isa<DagInit>(RV->getValue());
});
bool IsVarLenInst = Target.hasVariableLengthEncodings();
unsigned MaxInstLen = 0;

for (unsigned i = 0; i < NumberedEncodings.size(); ++i) {
Expand Down