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[X86] Remove SlowDivide tuning from GRTTuning #84676

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Merged
merged 2 commits into from
Mar 12, 2024
Merged

[X86] Remove SlowDivide tuning from GRTTuning #84676

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083ea9d
[X86] Remove SlowDivide tuning from GRTTuning
phoebewang Mar 10, 2024
9988996
Add coverage for goldmont and gracemont in bypass-slow-division-tune.ll
phoebewang Mar 11, 2024
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2 changes: 0 additions & 2 deletions llvm/lib/Target/X86/X86.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1237,8 +1237,6 @@ def ProcessorFeatures {
// Gracemont
list<SubtargetFeature> GRTTuning = [TuningMacroFusion,
TuningSlow3OpsLEA,
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LEA also seems to be reasonably fast on GRT.

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No sure. We have TuningSlow3OpsLEA for AlderLake and uops.info shows it has longer latency on it.

I don't have any information about newer targets.

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2c latency, but other slow lea is 3c. Bit of a middle ground.

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Interestingly, the latency was reduced to 1 since IceLake but was grown back to 2 on AlderLake.

I think we can change it for IceLake, but AlderLake etc. need more date provements.

TuningSlowDivide32,
TuningSlowDivide64,
TuningFastScalarFSQRT,
TuningFastVectorFSQRT,
TuningFast15ByteNOP,
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16 changes: 16 additions & 0 deletions llvm/test/CodeGen/X86/bypass-slow-division-tune.ll
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Expand Up @@ -4,6 +4,8 @@
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 < %s | FileCheck -check-prefixes=CHECK,REST,X64 %s
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=silvermont < %s | FileCheck -check-prefixes=CHECK,REST,SLM %s
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake < %s | FileCheck -check-prefixes=CHECK,REST,SKL %s
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=goldmont < %s | FileCheck -check-prefixes=CHECK,REST,GMT %s
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=gracemont < %s | FileCheck -check-prefixes=CHECK,REST,GMT %s
; RUN: llc -profile-summary-huge-working-set-size-threshold=1 -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake < %s | FileCheck -check-prefixes=HUGEWS %s

; Verify that div32 is bypassed only for Atoms.
Expand Down Expand Up @@ -117,6 +119,13 @@ define i64 @div64(i64 %a, i64 %b) {
; SKL-NEXT: # kill: def $eax killed $eax def $rax
; SKL-NEXT: retq
;
; GMT-LABEL: div64:
; GMT: # %bb.0: # %entry
; GMT-NEXT: movq %rdi, %rax
; GMT-NEXT: cqto
; GMT-NEXT: idivq %rsi
; GMT-NEXT: retq
;
; HUGEWS-LABEL: div64:
; HUGEWS: # %bb.0: # %entry
; HUGEWS-NEXT: movq %rdi, %rax
Expand Down Expand Up @@ -240,6 +249,13 @@ define i64 @div64_hugews(i64 %a, i64 %b) {
; SKL-NEXT: # kill: def $eax killed $eax def $rax
; SKL-NEXT: retq
;
; GMT-LABEL: div64_hugews:
; GMT: # %bb.0:
; GMT-NEXT: movq %rdi, %rax
; GMT-NEXT: cqto
; GMT-NEXT: idivq %rsi
; GMT-NEXT: retq
;
; HUGEWS-LABEL: div64_hugews:
; HUGEWS: # %bb.0:
; HUGEWS-NEXT: movq %rdi, %rax
Expand Down