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[AMDGCN] Use ZExt when handling indices in insertment element #85718

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Merged
merged 4 commits into from
Mar 20, 2024
Merged

[AMDGCN] Use ZExt when handling indices in insertment element #85718

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fe2d2aa
[AMDGCN] Use ZExt when handling indices in insertment element instruc…
DataCorrupted Mar 18, 2024
282d796
[AMDGPU] move test to codegenprepare-break-large-phis.ll
DataCorrupted Mar 19, 2024
e3e34bf
change function naming
DataCorrupted Mar 19, 2024
9aa773f
[AMDGPU] change test name and update groundtruth
DataCorrupted Mar 19, 2024
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4 changes: 2 additions & 2 deletions llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1749,7 +1749,7 @@ static bool isInterestingPHIIncomingValue(const Value *V) {
// Non constant index/out of bounds index -> folding is unlikely.
// The latter is more of a sanity check because canonical IR should just
// have replaced those with poison.
if (!Idx || Idx->getSExtValue() >= FVT->getNumElements())
if (!Idx || Idx->getZExtValue() >= FVT->getNumElements())
return false;

const auto *VecSrc = IE->getOperand(0);
Expand All @@ -1761,7 +1761,7 @@ static bool isInterestingPHIIncomingValue(const Value *V) {
return false;

CurVal = VecSrc;
EltsCovered.set(Idx->getSExtValue());
EltsCovered.set(Idx->getZExtValue());

// All elements covered.
if (EltsCovered.all())
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24 changes: 24 additions & 0 deletions llvm/test/CodeGen/AMDGPU/pr85717.ll
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@@ -0,0 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
;RUN: llc -mtriple=amdgcn -mcpu=gfx1036 < %s | FileCheck %s
define void @test(i1 %Bool, ptr %Ptr, <32 x float> %Vec1, <32 x float> %Vec2) {
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Name test pr85717? Can this merge in with the existing test for this?

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Moved to test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis.ll and adapted to size-four-vector to avoid excessive OPT-NEXT. Please check if the test is desirable.

; CHECK-LABEL: test:
; CHECK: ; %bb.0: ; %BB0
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_mov_b32 vcc_lo, exec_lo
; CHECK-NEXT: .LBB0_1: ; %BB1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
; CHECK-NEXT: s_cbranch_vccnz .LBB0_1
; CHECK-NEXT: ; %bb.2: ; %DummyReturnBlock
; CHECK-NEXT: s_setpc_b64 s[30:31]
BB0:
%I = insertelement <32 x float> %Vec1, float 4.200000e+01, i1 true
br label %BB1

BB1: ; preds = %BB0, %BB1, %BB2
%PHI = phi <32 x float> [ %I, %BB2 ], [ %Vec2, %BB1 ], [ zeroinitializer, %BB0 ]
store <32 x float> %PHI, ptr %Ptr, align 128
br i1 %Bool, label %BB1, label %BB2

BB2: ; preds = %BB1
br label %BB1
}