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[RISCV] Add missing feature predicates to some of the RVV pseudos #85983

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Mar 20, 2024
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[RISCV] Add missing feature predicates to some of the RVV pseudos #85983

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5 changes: 4 additions & 1 deletion llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
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Original file line number Diff line number Diff line change
Expand Up @@ -6698,6 +6698,7 @@ defm PseudoVFWREDOSUM : VPseudoVFWREDO_VS_RM;
// 15. Vector Mask Instructions
//===----------------------------------------------------------------------===//

let Predicates = [HasVInstructions] in {
//===----------------------------------------------------------------------===//
// 15.1 Vector Mask-Register Logical Instructions
//===----------------------------------------------------------------------===//
Expand All @@ -6718,7 +6719,6 @@ defm PseudoVMSET : VPseudoNullaryPseudoM<"VMXNOR">;
//===----------------------------------------------------------------------===//
// 15.2. Vector mask population count vcpop
//===----------------------------------------------------------------------===//

let IsSignExtendingOpW = 1 in
defm PseudoVCPOP: VPseudoVPOP_M;

Expand Down Expand Up @@ -6753,6 +6753,7 @@ defm PseudoVIOTA_M: VPseudoVIOTA_M;
// 15.9. Vector Element Index Instruction
//===----------------------------------------------------------------------===//
defm PseudoVID : VPseudoVID_V;
} // Predicates = [HasVInstructions]

//===----------------------------------------------------------------------===//
// 16. Vector Permutation Instructions
Expand Down Expand Up @@ -6828,6 +6829,7 @@ let Predicates = [HasVInstructionsAnyF] in {
//===----------------------------------------------------------------------===//
// 16.4. Vector Register Gather Instructions
//===----------------------------------------------------------------------===//
let Predicates = [HasVInstructions] in {
defm PseudoVRGATHER : VPseudoVGTR_VV_VX_VI<uimm5, "@earlyclobber $rd">;
defm PseudoVRGATHEREI16 : VPseudoVGTR_VV_EEW<eew=16,
Constraint="@earlyclobber $rd">;
Expand All @@ -6836,6 +6838,7 @@ defm PseudoVRGATHEREI16 : VPseudoVGTR_VV_EEW<eew=16,
// 16.5. Vector Compress Instruction
//===----------------------------------------------------------------------===//
defm PseudoVCOMPRESS : VPseudoVCPR_V;
} // Predicates = [HasVInstructions]

//===----------------------------------------------------------------------===//
// Patterns.
Expand Down