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[GlobalISel] Add CTLZ known bits. #86436

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Mar 26, 2024
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11 changes: 11 additions & 0 deletions llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -589,6 +589,17 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
}
break;
}
case TargetOpcode::G_CTLZ:
case TargetOpcode::G_CTLZ_ZERO_UNDEF: {
KnownBits SrcOpKnown;
computeKnownBitsImpl(MI.getOperand(1).getReg(), SrcOpKnown, DemandedElts,
Depth + 1);
// If we have a known 1, its position is our upper bound.
unsigned PossibleLZ = SrcOpKnown.countMaxLeadingZeros();
unsigned LowBits = llvm::bit_width(PossibleLZ);
Known.Zero.setBitsFrom(LowBits);
break;
}
}

assert(!Known.hasConflict() && "Bits known to be one AND zero?");
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4 changes: 1 addition & 3 deletions llvm/test/CodeGen/AArch64/setcc_knownbits.ll
Original file line number Diff line number Diff line change
Expand Up @@ -68,9 +68,7 @@ define i1 @lshr_ctlz_undef_cmpeq_one_i64(i64 %in) {
; CHECK-GI-LABEL: lshr_ctlz_undef_cmpeq_one_i64:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: clz x8, x0
; CHECK-GI-NEXT: lsr x8, x8, #6
; CHECK-GI-NEXT: cmp x8, #1
; CHECK-GI-NEXT: cset w0, eq
; CHECK-GI-NEXT: lsr w0, w8, #6
; CHECK-GI-NEXT: ret
%ctlz = call i64 @llvm.ctlz.i64(i64 %in, i1 -1)
%lshr = lshr i64 %ctlz, 6
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Original file line number Diff line number Diff line change
Expand Up @@ -64,9 +64,7 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK-NEXT: [[CTLZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTLZ_ZERO_UNDEF [[COPY]](s32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[CTLZ_ZERO_UNDEF]], [[C]]
; CHECK-NEXT: $vgpr0 = COPY [[AND]](s32)
; CHECK-NEXT: $vgpr0 = COPY [[CTLZ_ZERO_UNDEF]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s16) = G_CTLZ_ZERO_UNDEF %0
%2:_(s32) = G_ZEXT %1
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