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Merged
merged 12 commits into from
Apr 17, 2024
Merged

[MLIR][Flang][OpenMP] Make omp.simdloop into a loop wrapper #87365

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281121e
[MLIR][OpenMP] Add omp.loop_nest operation
skatrak Mar 29, 2024
2452bc7
[MLIR][OpenMP] Introduce the LoopWrapperInterface
skatrak Apr 1, 2024
e3c440c
Update op description according to review comments
skatrak Apr 2, 2024
904f274
Address review comments
skatrak Apr 2, 2024
99e8123
Merge branch 'users/skatrak/spr/loop-nest-01-mlir' into users/skatrak…
skatrak Apr 2, 2024
3bcb419
[MLIR][Flang][OpenMP] Make omp.simdloop into a loop wrapper
skatrak Apr 2, 2024
bce1464
Merge branch 'main' into users/skatrak/spr/loop-nest-03-simd-mlir
skatrak Apr 15, 2024
53c0a90
Update SimdClauseOps structure and address review comments
skatrak Apr 15, 2024
c2b0b0b
Fix format issues
skatrak Apr 15, 2024
ff7ab00
Merge branch 'main' into users/skatrak/spr/loop-nest-03-simd-mlir
skatrak Apr 16, 2024
2a7c0bb
Address review comments
skatrak Apr 16, 2024
5a07bdf
Merge branch 'main' into users/skatrak/spr/loop-nest-03-simd-mlir
skatrak Apr 17, 2024
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167 changes: 110 additions & 57 deletions flang/lib/Lower/OpenMP/OpenMP.cpp
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101 changes: 54 additions & 47 deletions flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
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Expand Up @@ -180,14 +180,16 @@ func.func @_QPsimd1(%arg0: !fir.ref<i32> {fir.bindc_name = "n"}, %arg1: !fir.ref
omp.parallel {
%1 = fir.alloca i32 {adapt.valuebyref, pinned}
%2 = fir.load %arg0 : !fir.ref<i32>
omp.simdloop for (%arg2) : i32 = (%c1_i32) to (%2) step (%c1_i32) {
fir.store %arg2 to %1 : !fir.ref<i32>
%3 = fir.load %1 : !fir.ref<i32>
%4 = fir.convert %3 : (i32) -> i64
%5 = arith.subi %4, %c1_i64 : i64
%6 = fir.coordinate_of %arg1, %5 : (!fir.ref<!fir.array<?xi32>>, i64) -> !fir.ref<i32>
fir.store %3 to %6 : !fir.ref<i32>
omp.yield
omp.simd {
omp.loop_nest (%arg2) : i32 = (%c1_i32) to (%2) step (%c1_i32) {
fir.store %arg2 to %1 : !fir.ref<i32>
%3 = fir.load %1 : !fir.ref<i32>
%4 = fir.convert %3 : (i32) -> i64
%5 = arith.subi %4, %c1_i64 : i64
%6 = fir.coordinate_of %arg1, %5 : (!fir.ref<!fir.array<?xi32>>, i64) -> !fir.ref<i32>
fir.store %3 to %6 : !fir.ref<i32>
omp.yield
}
}
omp.terminator
}
Expand All @@ -202,8 +204,8 @@ func.func @_QPsimd1(%arg0: !fir.ref<i32> {fir.bindc_name = "n"}, %arg1: !fir.ref
// CHECK: %[[ONE_3:.*]] = llvm.mlir.constant(1 : i64) : i64
// CHECK: %[[I_VAR:.*]] = llvm.alloca %[[ONE_3]] x i32 {pinned} : (i64) -> !llvm.ptr
// CHECK: %[[N:.*]] = llvm.load %[[N_REF]] : !llvm.ptr -> i32
// CHECK: omp.simdloop
// CHECK-SAME: (%[[I:.*]]) : i32 = (%[[ONE_2]]) to (%[[N]]) step (%[[ONE_2]]) {
// CHECK: omp.simd {
// CHECK-NEXT: omp.loop_nest (%[[I:.*]]) : i32 = (%[[ONE_2]]) to (%[[N]]) step (%[[ONE_2]]) {
// CHECK: llvm.store %[[I]], %[[I_VAR]] : i32, !llvm.ptr
// CHECK: %[[I1:.*]] = llvm.load %[[I_VAR]] : !llvm.ptr -> i32
// CHECK: %[[I1_EXT:.*]] = llvm.sext %[[I1]] : i32 to i64
Expand All @@ -212,6 +214,7 @@ func.func @_QPsimd1(%arg0: !fir.ref<i32> {fir.bindc_name = "n"}, %arg1: !fir.ref
// CHECK: llvm.store %[[I1]], %[[ARR_I_REF]] : i32, !llvm.ptr
// CHECK: omp.yield
// CHECK: }
// CHECK: }
// CHECK: omp.terminator
// CHECK: }
// CHECK: llvm.return
Expand Down Expand Up @@ -471,55 +474,59 @@ func.func @_QPomp_target() {

// -----

func.func @_QPsimdloop_with_nested_loop() {
func.func @_QPsimd_with_nested_loop() {
%0 = fir.alloca i32 {adapt.valuebyref}
%1 = fir.alloca !fir.array<10xi32> {bindc_name = "a", uniq_name = "_QFsimdloop_with_nested_loopEa"}
%2 = fir.alloca i32 {bindc_name = "i", uniq_name = "_QFsimdloop_with_nested_loopEi"}
%3 = fir.alloca i32 {bindc_name = "j", uniq_name = "_QFsimdloop_with_nested_loopEj"}
%1 = fir.alloca !fir.array<10xi32> {bindc_name = "a", uniq_name = "_QFsimd_with_nested_loopEa"}
%2 = fir.alloca i32 {bindc_name = "i", uniq_name = "_QFsimd_with_nested_loopEi"}
%3 = fir.alloca i32 {bindc_name = "j", uniq_name = "_QFsimd_with_nested_loopEj"}
%c1_i32 = arith.constant 1 : i32
%c10_i32 = arith.constant 10 : i32
%c1_i32_0 = arith.constant 1 : i32
omp.simdloop for (%arg0) : i32 = (%c1_i32) to (%c10_i32) inclusive step (%c1_i32_0) {
fir.store %arg0 to %0 : !fir.ref<i32>
%c1_i32_1 = arith.constant 1 : i32
%4 = fir.convert %c1_i32_1 : (i32) -> index
%c10_i32_2 = arith.constant 10 : i32
%5 = fir.convert %c10_i32_2 : (i32) -> index
%c1 = arith.constant 1 : index
%6 = fir.do_loop %arg1 = %4 to %5 step %c1 -> index {
%8 = fir.convert %arg1 : (index) -> i32
fir.store %8 to %3 : !fir.ref<i32>
%9 = fir.load %0 : !fir.ref<i32>
%10 = fir.load %0 : !fir.ref<i32>
%11 = fir.convert %10 : (i32) -> i64
%c1_i64 = arith.constant 1 : i64
%12 = arith.subi %11, %c1_i64 : i64
%13 = fir.coordinate_of %1, %12 : (!fir.ref<!fir.array<10xi32>>, i64) -> !fir.ref<i32>
fir.store %9 to %13 : !fir.ref<i32>
%14 = arith.addi %arg1, %c1 : index
fir.result %14 : index
omp.simd {
omp.loop_nest (%arg0) : i32 = (%c1_i32) to (%c10_i32) inclusive step (%c1_i32_0) {
fir.store %arg0 to %0 : !fir.ref<i32>
%c1_i32_1 = arith.constant 1 : i32
%4 = fir.convert %c1_i32_1 : (i32) -> index
%c10_i32_2 = arith.constant 10 : i32
%5 = fir.convert %c10_i32_2 : (i32) -> index
%c1 = arith.constant 1 : index
%6 = fir.do_loop %arg1 = %4 to %5 step %c1 -> index {
%8 = fir.convert %arg1 : (index) -> i32
fir.store %8 to %3 : !fir.ref<i32>
%9 = fir.load %0 : !fir.ref<i32>
%10 = fir.load %0 : !fir.ref<i32>
%11 = fir.convert %10 : (i32) -> i64
%c1_i64 = arith.constant 1 : i64
%12 = arith.subi %11, %c1_i64 : i64
%13 = fir.coordinate_of %1, %12 : (!fir.ref<!fir.array<10xi32>>, i64) -> !fir.ref<i32>
fir.store %9 to %13 : !fir.ref<i32>
%14 = arith.addi %arg1, %c1 : index
fir.result %14 : index
}
%7 = fir.convert %6 : (index) -> i32
fir.store %7 to %3 : !fir.ref<i32>
omp.yield
}
%7 = fir.convert %6 : (index) -> i32
fir.store %7 to %3 : !fir.ref<i32>
omp.yield
}
return
}

// CHECK-LABEL: llvm.func @_QPsimdloop_with_nested_loop() {
// CHECK-LABEL: llvm.func @_QPsimd_with_nested_loop() {
// CHECK: %[[LOWER:.*]] = llvm.mlir.constant(1 : i32) : i32
// CHECK: %[[UPPER:.*]] = llvm.mlir.constant(10 : i32) : i32
// CHECK: %[[STEP:.*]] = llvm.mlir.constant(1 : i32) : i32
// CHECK: omp.simdloop for (%[[CNT:.*]]) : i32 = (%[[LOWER]]) to (%[[UPPER]]) inclusive step (%[[STEP]]) {
// CHECK: llvm.br ^bb1(%[[VAL_1:.*]], %[[VAL_2:.*]] : i64, i64)
// CHECK: ^bb1(%[[VAL_3:.*]]: i64, %[[VAL_4:.*]]: i64):
// CHECK: %[[VAL_5:.*]] = llvm.mlir.constant(0 : index) : i64
// CHECK: %[[VAL_6:.*]] = llvm.icmp "sgt" %[[VAL_4]], %[[VAL_5]] : i64
// CHECK: llvm.cond_br %[[VAL_6]], ^bb2, ^bb3
// CHECK: ^bb2:
// CHECK: llvm.br ^bb1(%[[VAL_7:.*]], %[[VAL_8:.*]] : i64, i64)
// CHECK: ^bb3:
// CHECK: omp.yield
// CHECK: omp.simd {
// CHECK-NEXT: omp.loop_nest (%[[CNT:.*]]) : i32 = (%[[LOWER]]) to (%[[UPPER]]) inclusive step (%[[STEP]]) {
// CHECK: llvm.br ^bb1(%[[VAL_1:.*]], %[[VAL_2:.*]] : i64, i64)
// CHECK: ^bb1(%[[VAL_3:.*]]: i64, %[[VAL_4:.*]]: i64):
// CHECK: %[[VAL_5:.*]] = llvm.mlir.constant(0 : index) : i64
// CHECK: %[[VAL_6:.*]] = llvm.icmp "sgt" %[[VAL_4]], %[[VAL_5]] : i64
// CHECK: llvm.cond_br %[[VAL_6]], ^bb2, ^bb3
// CHECK: ^bb2:
// CHECK: llvm.br ^bb1(%[[VAL_7:.*]], %[[VAL_8:.*]] : i64, i64)
// CHECK: ^bb3:
// CHECK: omp.yield
// CHECK: }
// CHECK: }
// CHECK: llvm.return
// CHECK: }
Expand Down
23 changes: 11 additions & 12 deletions flang/test/Lower/OpenMP/FIR/if-clause.f90
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Expand Up @@ -116,15 +116,15 @@ program main
do i = 1, 10
end do
!$omp end parallel do simd

! CHECK: omp.parallel
! CHECK-SAME: if({{.*}})
! CHECK: omp.wsloop
!$omp parallel do simd if(parallel: .true.) if(simd: .false.)
do i = 1, 10
end do
!$omp end parallel do simd

! CHECK: omp.parallel
! CHECK-SAME: if({{.*}})
! CHECK: omp.wsloop
Expand All @@ -134,7 +134,7 @@ program main
do i = 1, 10
end do
!$omp end parallel do simd

! CHECK: omp.parallel
! CHECK-NOT: if({{.*}})
! CHECK-SAME: {
Expand All @@ -147,22 +147,22 @@ program main
! ----------------------------------------------------------------------------
! SIMD
! ----------------------------------------------------------------------------
! CHECK: omp.simdloop
! CHECK: omp.simd
! CHECK-NOT: if({{.*}})
! CHECK-SAME: {
!$omp simd
do i = 1, 10
end do
!$omp end simd

! CHECK: omp.simdloop
! CHECK: omp.simd
! CHECK-SAME: if({{.*}})
!$omp simd if(.true.)
do i = 1, 10
end do
!$omp end simd

! CHECK: omp.simdloop
! CHECK: omp.simd
! CHECK-SAME: if({{.*}})
!$omp simd if(simd: .true.)
do i = 1, 10
Expand Down Expand Up @@ -281,7 +281,6 @@ program main
end do
!$omp end target parallel do


! CHECK: omp.target
! CHECK-NOT: if({{.*}})
! CHECK-SAME: {
Expand Down Expand Up @@ -360,7 +359,7 @@ program main
! CHECK: omp.target
! CHECK-NOT: if({{.*}})
! CHECK-SAME: {
! CHECK: omp.simdloop
! CHECK: omp.simd
! CHECK-NOT: if({{.*}})
! CHECK-SAME: {
!$omp target simd
Expand All @@ -370,7 +369,7 @@ program main

! CHECK: omp.target
! CHECK-SAME: if({{.*}})
! CHECK: omp.simdloop
! CHECK: omp.simd
! CHECK-SAME: if({{.*}})
!$omp target simd if(.true.)
do i = 1, 10
Expand All @@ -379,7 +378,7 @@ program main

! CHECK: omp.target
! CHECK-SAME: if({{.*}})
! CHECK: omp.simdloop
! CHECK: omp.simd
! CHECK-SAME: if({{.*}})
!$omp target simd if(target: .true.) if(simd: .false.)
do i = 1, 10
Expand All @@ -388,7 +387,7 @@ program main

! CHECK: omp.target
! CHECK-SAME: if({{.*}})
! CHECK: omp.simdloop
! CHECK: omp.simd
! CHECK-NOT: if({{.*}})
! CHECK-SAME: {
!$omp target simd if(target: .true.)
Expand All @@ -399,7 +398,7 @@ program main
! CHECK: omp.target
! CHECK-NOT: if({{.*}})
! CHECK-SAME: {
! CHECK: omp.simdloop
! CHECK: omp.simd
! CHECK-SAME: if({{.*}})
!$omp target simd if(simd: .true.)
do i = 1, 10
Expand Down
2 changes: 1 addition & 1 deletion flang/test/Lower/OpenMP/FIR/loop-combined.f90
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Expand Up @@ -75,7 +75,7 @@ program main
! TARGET SIMD
! ----------------------------------------------------------------------------
! CHECK: omp.target
! CHECK: omp.simdloop
! CHECK: omp.simd
!$omp target simd
do i = 1, 10
end do
Expand Down
3 changes: 2 additions & 1 deletion flang/test/Lower/OpenMP/FIR/parallel-private-clause.f90
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Expand Up @@ -361,7 +361,8 @@ subroutine simd_loop_1
! FIRDialect: %[[UB:.*]] = arith.constant 9 : i32
! FIRDialect: %[[STEP:.*]] = arith.constant 1 : i32

! FIRDialect: omp.simdloop for (%[[I:.*]]) : i32 = (%[[LB]]) to (%[[UB]]) inclusive step (%[[STEP]]) {
! FIRDialect: omp.simd {
! FIRDialect-NEXT: omp.loop_nest (%[[I:.*]]) : i32 = (%[[LB]]) to (%[[UB]]) inclusive step (%[[STEP]]) {
!$OMP SIMD PRIVATE(r)
do i=1, 9
! FIRDialect: fir.store %[[I]] to %[[LOCAL:.*]] : !fir.ref<i32>
Expand Down
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